Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
06/1999
06/23/1999CN1220740A Liquid crystal device, electrooptic device, and projection display device using the same
06/23/1999CN1220496A Semiconductor device
06/22/1999US5915204 Method of manufacturing a semiconductor device including a metal silicide layer
06/22/1999US5915197 Fabrication process for semiconductor device
06/22/1999US5915196 Method of forming shallow diffusion layers in a semiconductor substrate in the vicinity of a gate electrode
06/22/1999US5915195 Ion implantation process to improve the gate oxide quality at the edge of a shallow trench isolation structure
06/22/1999US5915187 Method of manufacturing a semiconductor device with a pn junction provided through epitaxy
06/22/1999US5915186 Transistors on semiconductor substrate
06/22/1999US5915185 Method of producing MOSFET transistors by means of tilted implants
06/22/1999US5915183 Forming structure using salicide gate conductor in the process
06/22/1999US5915182 MOSFET with self-aligned silicidation and gate-side air-gap structure
06/22/1999US5915180 Process for producing a semiconductor device having a single thermal oxidizing step
06/22/1999US5915179 Simplified formation of miniaturized schottky barrier diodes and field effect transistors
06/22/1999US5915178 Method for improving the endurance of split gate flash EEPROM devices via the addition of a shallow source side implanted region
06/22/1999US5915177 EPROM manufacturing process having a floating gate with a large surface area
06/22/1999US5915176 Method of making floating gate based memory device
06/22/1999US5915173 Thin film transistor and method for fabricating the same
06/22/1999US5915172 Method for manufacturing LCD and TFT
06/22/1999US5915164 Undercut-etching into electroconductive gallium nitride layer below masked portions of semi-dielectric aluminum nitride layer, then filling cavity with gallium nitride layer of opposite conductivity type to form p-n junction
06/22/1999US5914894 Method for implementing a learning function
06/22/1999US5914635 Semiconductor amplifier circuit which eliminates an unsaturated state caused by a pull-up resistor
06/22/1999US5914530 Semiconductor device
06/22/1999US5914522 Power semiconductor structure with lateral transistor driven by vertical transistor
06/22/1999US5914521 Semiconductor device
06/22/1999US5914520 Micromechanical sensor device
06/22/1999US5914519 Air-gap spacer of a metal-oxide-semiconductor device
06/22/1999US5914517 Trench-isolation type semiconductor device
06/22/1999US5914515 Semiconductor device
06/22/1999US5914514 Two transistor flash EPROM cell
06/22/1999US5914513 Electronically tunable capacitor
06/22/1999US5914509 Two-terminal electrically-reprogrammable programmable logic element
06/22/1999US5914506 Charge coupled device having two-layer electrodes and method of manufacturing the same
06/22/1999US5914504 DRAM applications using vertical MISFET devices
06/22/1999US5914503 Insulated gate thyristor
06/22/1999US5914502 Semiconductor device
06/22/1999US5914500 Junction termination for SiC Schottky diode
06/22/1999US5914499 High voltage silicon carbide semiconductor device with bended edge
06/22/1999US5914498 Semiconductor integrated circuit and method of fabricating same
06/22/1999US5914276 Methods of forming electrically conductive lines using nitrogen and chlorine containing gas mixtures
06/22/1999US5914183 Porous semiconductor material
06/17/1999WO1999030369A2 Thin film transistors and electronic devices comprising such
06/17/1999WO1999030363A2 Semiconductor device and method of manufacturing such a device
06/17/1999WO1999030361A1 Spacer formation for precise salicide formation
06/17/1999WO1999030358A2 Ion implantation process
06/17/1999WO1999030352A2 Method for producing a matrix from thin-film transistors with storage capacities
06/17/1999WO1999029711A1 Self-addressable self-assembling microelectronic integrated systems, component devices, mechanisms, methods, and procedures for molecular biological analysis and diagnostics
06/17/1999WO1999017376A3 Diode device having a low threshold voltage
06/17/1999WO1999016158A3 Time-domain circuit modeller
06/17/1999WO1998040909A3 Method of forming etched structures comprising implantation steps
06/17/1999DE19826022C1 Optical thyristor control device
06/17/1999CA2312568A1 Self-addressable self-assembling microelectronic integrated systems, component devices, mechanisms, methods, and procedures for molecular biological analysis and diagnostics
06/16/1999EP0923139A2 Nonvolatile semiconductor memory device and method of application of write voltage of the same
06/16/1999EP0923138A2 Thin -film semiconductor device, its manufacture and display sytem
06/16/1999EP0923137A2 Trenched field effect transistor and method of its manufacture
06/16/1999EP0923136A2 Gate turn off thyristor with stop layer
06/16/1999EP0923135A1 Ferroelectric memory device
06/16/1999EP0923134A1 Active matrix circuit board and method of manufacturing it
06/16/1999EP0923133A1 Silicon on insulator device having an input/output protection
06/16/1999EP0923132A1 Semiconductor device
06/16/1999EP0923119A2 Method of manufacturing a MOSFET
06/16/1999EP0923118A2 Method of manufacturing a MOSFET
06/16/1999EP0923117A1 Method of manufacture of single transistor ferroelectric memory cell using chemical-mechanical polishing
06/16/1999EP0923114A2 Process for self-aligned implantation
06/16/1999EP0923113A2 Low temperature diffusion process for dopant concentration enhancement
06/16/1999EP0923093A2 Vertical array capacitor
06/16/1999EP0922991A2 Transverse electrical field type active matrix liquid crystal display apparatus and method for producing same
06/16/1999EP0922302A2 Lateral mos transistor device
06/16/1999EP0922301A1 Substrate with conductor formed of low-resistance aluminum alloy
06/16/1999EP0904604A4 Fabrication of high-density trench dmos using sidewall spacers
06/16/1999EP0902980A4 Long channel trench-gated power mosfet having fully depleted body region
06/16/1999EP0894148A4 Transistor-based molecular detection apparatus and method
06/16/1999EP0702852B1 Manufacture of electronic devices comprising thin-film transistors
06/16/1999CN1219788A Quantum trap infra-red focus planar chip without discrete image element optical read-out
06/16/1999CN1219775A MIS semiconductor device and method for fabricating the same
06/16/1999CN1219771A Semiconductor device and fabrication method thereof
06/16/1999CN1219761A Reduced parasitic resistance and capacitance field effect transistor
06/16/1999CN1043704C Semiconductor device and method for forming same
06/16/1999CN1043703C Semiconductor device, method for producing same, and liquid crystal display including same
06/15/1999US5913139 Method of manufacturing a semiconductor device with local interconnect of metal silicide
06/15/1999US5913136 Process for making a transistor with self-aligned source and drain contacts
06/15/1999US5913135 Method for forming planar field effect transistors with source and drain on oxide and device constructed therefrom
06/15/1999US5913130 Method for fabricating a power device
06/15/1999US5913124 Method of making a self-aligned silicide
06/15/1999US5913122 Method of making high breakdown voltage twin well device with source/drain regions widely spaced from FOX regions
06/15/1999US5913121 Method of making a self-aligning type contact hole for a semiconductor device
06/15/1999US5913120 Process for fabricating integrated devices including nonvolatile memories and transistors with tunnel oxide protection
06/15/1999US5913112 Method of manufacturing an insulated gate field effect semiconductor device having an offset region and/or lightly doped region
06/15/1999US5913111 Method of manufacturing an insulaed gate transistor
06/15/1999US5912843 Scalable flash EEPROM memory cell, method of manufacturing and operation thereof
06/15/1999US5912842 Nonvolatile PMOS two transistor memory cell and array
06/15/1999US5912835 Non-volatile ferroelectric memory device for storing data bits restored upon power-on and intermittently refreshed
06/15/1999US5912591 Oscillator circuit and delay circuit
06/15/1999US5912509 MOS semiconductor device and method of manufacturing the same
06/15/1999US5912501 Elimination of radius of curvature effects of p-n junction avalanche breakdown using slots
06/15/1999US5912499 Pressure transducer comprising a sealed transducer with a rigid diaphragm
06/15/1999US5912498 Article comprising an oxide layer on GAN
06/15/1999US5912497 Insulated gate bipolar transistor
06/15/1999US5912495 For an inductive load
06/15/1999US5912493 Enhanced oxidation for spacer formation integrated with LDD implantation
06/15/1999US5912492 Integrated circuit structure incorporating a metal oxide semiconductor field effect transistor (MOSFET) having improved hot carrier immunity
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