Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
09/1999
09/21/1999US5956588 High withstand voltage transistor and method for manufacturing the same
09/21/1999US5956582 Current limiting circuit with continuous metallization
09/21/1999US5956580 Method to form ultra-short channel elevated S/D MOSFETS on an ultra-thin SOI substrate
09/21/1999US5956579 Semiconductor, semiconductor device, and method for fabricating the same
09/21/1999US5956577 Method of manufacturing serrated gate-type or joined structure
09/21/1999US5956568 Methods of fabricating and contacting ultra-small semiconductor devices
09/21/1999US5956271 Channel hot electron programmed memory device having improved reliability and operability
09/21/1999US5956268 Nonvolatile memory structure
09/21/1999US5956104 Active matrix-type liquid crystal display device and method of making the same
09/21/1999US5956103 Active matrix substrate with the double layered structure
09/21/1999US5956011 Matrix type liquid-crystal display unit
09/21/1999US5956009 Electro-optical device
09/21/1999US5955818 Machine structures fabricated of multiple microstructure layers
09/21/1999US5955776 Spherical shaped semiconductor integrated circuit
09/21/1999US5955775 Structure of complementary bipolar transistors
09/21/1999US5955774 Integrated circuit ferroelectric memory devices including resistors in periphery region
09/21/1999US5955773 Closely pitched polysilicon fuses and method of forming the same
09/21/1999US5955772 Heterostructure thermionic coolers
09/21/1999US5955770 Method of forming raised source/drain regions in an integrated circuit
09/21/1999US5955766 Diode with controlled breakdown
09/21/1999US5955765 Thin-film dual gate, common channel semiconductor device having a single first gate and a multi-gate second gate structure
09/21/1999US5955762 Microelectronic package with polymer ESD protection
09/21/1999US5955761 Semiconductor device and manufacturing method thereof
09/21/1999US5955760 Transistor device structures
09/21/1999US5955759 Reduced parasitic resistance and capacitance field effect transistor
09/21/1999US5955755 Semiconductor storage device and method for manufacturing the same
09/21/1999US5955754 Integrated circuits having mixed layered superlattice materials and precursor solutions for use in a process of making the same
09/21/1999US5955750 Four-region (PNPN) semiconductor device
09/21/1999US5955746 SRAM having enhanced cell ratio
09/21/1999US5955745 Semiconductor device having SiGe spacer under an active layer
09/21/1999US5955744 LCD with increased pixel opening sizes
09/21/1999US5955742 Semiconductor device formed on a substrate having an off-angle surface and a fabrication process thereof
09/21/1999US5955685 Sputtering target for forming magnetic thin film and fabrication method thereof
09/21/1999US5955384 Method of fabricating semiconductor device
09/21/1999US5955213 Single crystal substrates of silicon, with ferroelectric thin film with scandium and yttrium, manganese and oxygen for computers
09/16/1999WO1999046821A2 Semiconductor switch devices and their manufacture
09/16/1999WO1999046809A1 Devices formable by low temperature direct bonding
09/16/1999WO1999034449A3 A high voltage thin film transistor with improved on-state characteristics and method for making same
09/16/1999WO1999031731A3 Silicon oxide insulator (soi) semiconductor having selectively linked body
09/16/1999DE19906067A1 Semiconductor sensor detecting and measuring e.g. acceleration, yaw rate or vibration
09/16/1999DE19811080A1 Memory cell arrangement
09/15/1999EP0942583A1 A display type image sensor
09/15/1999EP0942467A1 Process for fabricating bipolar and bicmos devices
09/15/1999EP0942465A2 Self aligned buried plate
09/15/1999EP0942460A1 Process for forming a low resistive Titanum silicide layer on a semiconductor substrate and device obtained thereby
09/15/1999EP0941552A2 Semiconductor device with memory capacitor and method of manufacturing such a device
09/15/1999EP0941460A1 Process for producing micromechanical sensors
09/15/1999CN1228837A Micromechanical sensor
09/15/1999CN1228616A Semiconductor device having metal silicide film and manufacturing method thereof
09/15/1999CN1228610A Self aligned buried plate
09/15/1999CN1045139C Grid-controlled transistor
09/14/1999US5953632 Method for manufacturing semiconductor device comprising a silicide film
09/14/1999US5953619 Semiconductor device with perovskite capacitor and its manufacture method
09/14/1999US5953617 Method for manufacturing optoelectronic integrated circuits
09/14/1999US5953616 Method of fabricating a MOS device with a salicide structure
09/14/1999US5953613 High performance MOSFET with a source removed from the semiconductor substrate and fabrication method thereof
09/14/1999US5953611 Method of fabricating nonvolatile semiconductor memory devices with select gates
09/14/1999US5953610 Method of fabricating non volatile memory device with memory cells which differ in gate couple ratio
09/14/1999US5953605 Fabrication process of semiconductor device
09/14/1999US5953602 EEPROM cell and related method of making thereof
09/14/1999US5953598 Thin film transistor and fabrication process of the same
09/14/1999US5953597 Method for producing insulated gate thin film semiconductor device
09/14/1999US5953596 Methods of forming thin film transistors
09/14/1999US5953595 Method of manufacturing thin film transistor
09/14/1999US5953584 Method of fabricating liquid crystal display device having alignment direction determined
09/14/1999US5953583 Manufacturing method of a thin-film transistor
09/14/1999US5953582 Active matrix panel manufacturing method including TFTS having variable impurity concentration levels
09/14/1999US5953254 Serial flash memory
09/14/1999US5953246 Semiconductor memory device such as a DRAM capable of holding data without refresh
09/14/1999US5953245 Semiconductor memory device and method of controlling imprint condition thereof
09/14/1999US5953085 Liquid crystal display device having a storage capacitor
09/14/1999US5953084 Transmission type liquid crystal display device having capacitance ratio of 10% or less and charging rate difference of 0.6% or less
09/14/1999US5952989 Active matrix circuit
09/14/1999US5952854 Sampling circuit and image display device
09/14/1999US5952847 For an integrated circuit
09/14/1999US5952725 Stacked semiconductor devices
09/14/1999US5952708 Electro-optical device
09/14/1999US5952707 Semiconductor structure
09/14/1999US5952705 Monolithically integrated planar semi-conductor arrangement with temperature compensation
09/14/1999US5952703 Multilayer, cadmium telluride or cadmium-zinc telluride or zinc telluride layer is formed on gallium arsenide layer which covers silicon substrate; used to form infra-red detector
09/14/1999US5952702 High performance MOSFET structure having asymmetrical spacer formation and having source and drain regions with different doping concentration
09/14/1999US5952700 MOSFET device with unsymmetrical LDD region
09/14/1999US5952699 Insulated gate semiconductor device and method of manufacturing the same
09/14/1999US5952695 Silicon-on-insulator and CMOS-on-SOI double film structures
09/14/1999US5952693 CMOS semiconductor device comprising graded junctions with reduced junction capacitance
09/14/1999US5952692 Memory device with improved charge storage barrier structure
09/14/1999US5952690 Thin film transistor and fabrication method of the same
09/14/1999US5952683 Functional semiconductor element with avalanche multiplication
09/14/1999US5952682 Semiconductor device with deep anode and lifetime reduction region
09/14/1999US5952679 Semiconductor substrate and method for straightening warp of semiconductor substrate
09/14/1999US5952678 The thin film transistor has p-channel part doped by boron difluoride, formed above the balk transistor part; improving memory cells high resist to soft error and no parasitic capacitance
09/14/1999US5952677 Thin film transistor and method for manufacturing the same
09/14/1999US5952675 Thin film transistor element array
09/14/1999US5952672 Containing phosphide
09/14/1999US5951879 Forming a polysilicon layer on a silicon dioxide layer formed on a silicon substrate, masking, etching, wherein said etching step comprises using a mixed gas of an etching gas and an oxygen gas
09/14/1999US5951773 Inductively coupled plasma chemical vapor deposition apparatus
09/14/1999US5951756 Method of forming GaAs/AlGaAs hetero-structure and GaAs/AlGaAs hetero-structure obtained by the method
09/14/1999US5951754 Adsorbing an element of goup 6 of periodic table to the surface of quantum well structure, growing by liquid-drop epitaxy, crystal structures of metal or semiconductor, chemical etching well structure, then removing masks
09/10/1999WO1999045594A1 Field effect semiconductor device having dipole barrier
09/10/1999WO1999045593A1 Three-dimensional device