Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
08/2000
08/29/2000US6110812 Method for forming polycide gate
08/29/2000US6110810 Process for forming N-channel through amorphous silicon (αSi) implantation MOS process
08/29/2000US6110804 Method of fabricating a semiconductor device having a floating field conductor
08/29/2000US6110803 Method for fabricating a high-bias device
08/29/2000US6110799 Trench contact process
08/29/2000US6110790 Method for making a MOSFET with self-aligned source and drain contacts including forming an oxide liner on the gate, forming nitride spacers on the liner, etching the liner, and forming contacts in the gaps
08/29/2000US6110787 Method for fabricating a MOS device
08/29/2000US6110786 Semiconductor device having elevated gate electrode and elevated active regions and method of manufacture thereof
08/29/2000US6110785 Formulation of high performance transistors using gate trim etch process
08/29/2000US6110784 High dielectric constant and level of nitrogen doping
08/29/2000US6110783 Method for forming a notched gate oxide asymmetric MOS device
08/29/2000US6110770 Semiconductor and process for fabricating the same
08/29/2000US6110769 SOI (silicon on insulator) device and method for fabricating the same
08/29/2000US6110767 Reversed MOS
08/29/2000US6110763 One mask, power semiconductor device fabrication process
08/29/2000US6110756 Method for producing semiconductor laser
08/29/2000US6110393 Attaching circuit layer; semiconductors and microelectronics
08/29/2000US6109207 Process for fabricating semiconductor device with shallow p-type regions using dopant compounds containing elements of high solid solubility
08/24/2000WO2000049663A1 Self-aligned shield structure for realizing high frequency power mosfet devices with improved reliability
08/24/2000WO2000049662A1 Igbt with pn insulation
08/24/2000WO2000049661A1 Insulated-gate field-effect semiconductor device
08/24/2000WO2000049659A1 Microelectronic device for storing information and method thereof
08/24/2000WO2000049645A1 Electrode for semiconductor device and its manufacturing method
08/24/2000WO2000049643A2 Gate insulator comprising high and low dielectric constant parts
08/24/2000WO2000049087A1 Epoxy resin composition
08/24/2000WO2000013236A3 Layered dielectric on silicon carbide semiconductor structures
08/24/2000DE19906384A1 Insulated gate bipolar transistor with electric pn-junction insulation of adjacent components
08/24/2000DE19905421A1 Power semiconductor component with reduced Miller capacity such as IGBT or MOSFET in current rectifier, half-bridges, and switches
08/24/2000CA2328907A1 Electrode for semiconductor device and its manufacturing method
08/23/2000EP1030383A2 Charge-transport structures
08/23/2000EP1030375A1 Semiconductor device and its manufacturing method
08/23/2000EP1030374A1 Semiconductor device and method for driving the same
08/23/2000EP1030373A1 Power semiconductor diode with insulated gate and manufacturing method thereof
08/23/2000EP1030372A2 Method of making an IGBT device
08/23/2000EP1030371A1 Field-effect transistor
08/23/2000EP1030352A2 Method and apparatus for forming materials layers from atomic gases
08/23/2000EP1029368A1 Semiconductor substrate and method for making the same
08/23/2000EP1029364A1 Memory device having a crested tunnel barrier
08/23/2000EP1029363A2 A SEMICONDUCTOR DEVICE OF SiC AND A TRANSISTOR OF SiC HAVING AN INSULATED GATE
08/23/2000EP1029362A1 Semiconductor component
08/23/2000EP1029361A1 High power density microwave hbt with uniform signal distribution
08/23/2000EP1029360A2 Vertical interconnect process for silicon segments with dielectric isolation
08/23/2000EP1029359A1 Quantum ridges and tips
08/23/2000EP1029358A1 High voltage resistant edge structure for semiconductor elements
08/23/2000EP1029357A2 Semiconductor device of sic with insulating layer and a refractory metal nitride layer
08/23/2000EP1029354A1 Porous silicon oxycarbide integrated circuit insulator
08/23/2000EP1029346A1 Vertical interconnect process for silicon segments with thermally conductive epoxy preform
08/23/2000CN2393222Y Diode rectifier for industry use
08/23/2000CN1264498A Microelectronic components and electronic networks comprising DNA
08/23/2000CN1264180A Semiconductor device and manufacture method
08/23/2000CN1264179A Three-layer polycrystal cilicon inserted non-volatile memory unit and manufacture method thereof
08/23/2000CN1264178A 半导体装置 Semiconductor device
08/23/2000CN1264166A Manufacture of shallow junction semiconductor device
08/23/2000CN1264165A Semiconductor device and manufacture method thereof
08/23/2000CN1264164A Method for formation grid oxide of metal oxide semiconductor
08/23/2000CN1264160A Method for integrated substrate contact on insulator silicon chip with shallow ridges insulation technology
08/23/2000CN1264159A Foreign-body elminating method, film forming method, semiconductor device and film forming device
08/23/2000CN1264158A Autoregistered channel injection
08/23/2000CN1055791C Crystalline silicon film, semiconductor device and method for producing the same
08/23/2000CN1055790C Semiconductor device and method for manufacturing the same
08/23/2000CN1055786C Semiconductor device and manufacture method thereof
08/22/2000US6108262 Static memory cell having independent data holding voltage
08/22/2000US6108056 Active matrix electro-optical device
08/22/2000US6108055 Display and method of fabricating the same
08/22/2000US6107688 Aluminum-containing films derived from using hydrogen and oxygen gas in sputter deposition
08/22/2000US6107673 Series connection of diodes
08/22/2000US6107670 Contact structure of semiconductor device
08/22/2000US6107668 Thin film transistor substrate having low resistive and chemical resistant electrode interconnections and method of forming the same
08/22/2000US6107667 MOS transistor with low-k spacer to suppress capacitive coupling between gate and source/drain extensions
08/22/2000US6107662 Thin film transistor and method for fabricating the same
08/22/2000US6107661 Semiconductor device and method of manufacturing same
08/22/2000US6107660 Vertical thin film transistor
08/22/2000US6107659 Nonvolatile semiconductor memory device operable at high speed with low power supply voltage while preventing overerasing/overwriting
08/22/2000US6107656 Ferroelectric transistors, semiconductor storage devices, method of operating ferroelectric transistors and method of manufacturing ferromagnetic transistors
08/22/2000US6107654 Semiconductor device
08/22/2000US6107651 Gate turn-off thyristor with stop layer
08/22/2000US6107650 Insulated gate semiconductor device and manufacturing method thereof
08/22/2000US6107649 Field-controlled high-power semiconductor devices
08/22/2000US6107641 Thin film transistor with reduced parasitic capacitance and reduced feed-through voltage
08/22/2000US6107640 Semiconductor device for a thin film transistor
08/22/2000US6107639 Semiconductor device with rod like crystals and a recessed insulation layer
08/22/2000US6107176 Forming a polysilicon layer on oxide layer, doping a barrier matal ion into upper surface of polysilicon, forming aconductive layer on doped polysilicon, annealing to form barrier from a reaction between barrier matal and polysilicon
08/22/2000US6107174 Gate dielectric silicon oxynitride film is made by nitriting the thermal oxide film by introducing nitrogen from top surface
08/22/2000US6107171 Method to manufacture metal gate of integrated circuits
08/22/2000US6107160 MOSFET having buried shield plate for reduced gate/drain capacitance
08/22/2000US6107156 Silicide layer forming method and semiconductor integrated circuit
08/22/2000US6107151 Suppressing the creation of gallium interstitials which can activate the zinc substitutional-interstitial diffusion mechanism by minimizing n+ doping regions to minimize zinc diffusion
08/22/2000US6107150 Implanting nitrogen into a region of a semiconducting substrate, forming a nitrogen bearing silicon oxide gate dielectric above the region in the substrate, forming a gate conductor over the gate dielectric, forming source and drain
08/22/2000US6107149 CMOS semiconductor device comprising graded junctions with reduced junction capacitance
08/22/2000US6107147 Stacked poly/amorphous silicon gate giving low sheet resistance silicide film at submicron linewidths
08/22/2000US6107142 Self-aligned methods of fabricating silicon carbide power devices by implantation and lateral diffusion
08/22/2000US6107141 Flash EEPROM
08/22/2000US6107130 CMOS integrated circuit having a sacrificial metal spacer for producing graded NMOS source/drain junctions dissimilar from PMOS source/drain junctions
08/22/2000US6107129 Integrated circuit having multiple LDD and/or source/drain implant steps to enhance circuit performance
08/22/2000US6107128 Semiconductor device and method of manufacturing the same
08/22/2000US6107127 Method of making shallow well MOSFET structure
08/22/2000US6107124 Charge coupled device and method of fabricating the same
08/22/2000US6107117 Applying a solution of poly(3-alkylthiophene) combined with a solvent over the layer of insulating material selected from polyimide, polyester, and polymethyl methacrylate and forming active layer, then forming source and drain electrodes
08/22/2000US6107096 Forming high purity thin films having uniform thickness and high reproducibility by chemical vapor deposition using gasified cobalt organic compound and thermal annealing to form cobalt disilicide on diffusion layers and gate electrode
08/22/2000US6106735 Wafer stack and method of producing sensors