| Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143) |
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| 01/23/2001 | US6177703 Method and apparatus for producing a single polysilicon flash EEPROM having a select transistor and a floating gate transistor |
| 01/23/2001 | US6177702 Semiconductor component with a split floating gate and tunnel region |
| 01/23/2001 | US6177696 Integration scheme enhancing deep trench capacitance in semiconductor integrated circuit devices |
| 01/23/2001 | US6177692 Solid-state image sensor output MOSFET circuit |
| 01/23/2001 | US6177687 Semiconductor device having gate electrode shared between two sets of active regions and fabrication thereof |
| 01/23/2001 | US6177685 Nitride-type III-V HEMT having an InN 2DEG channel layer |
| 01/23/2001 | US6177363 Providing an oxide layer on a semiconductor substrate, depositing nitride layer on oxide layer to introduce defects in nitride layer such that a defect density is sufficiently large to provide a low interfacial trap density |
| 01/23/2001 | US6177346 Integrated circuitry and method of forming a field effect transistor |
| 01/23/2001 | US6177335 Method of forming polycide |
| 01/23/2001 | US6177325 Self-aligned emitter and base BJT process and structure |
| 01/23/2001 | US6177324 ESD protection device for STI deep submicron technology |
| 01/23/2001 | US6177323 Method to form MOSFET with an elevated source/drain for PMOSFET |
| 01/23/2001 | US6177322 High voltage transistor with high gated diode breakdown voltage |
| 01/23/2001 | US6177321 Semiconductor device and fabrication method thereof |
| 01/23/2001 | US6177314 Method of manufacturing a semiconductor device comprising a field effect transistor |
| 01/23/2001 | US6177313 Method for forming a muti-level ROM memory in a dual gate CMOS process, and corresponding ROM memory cell |
| 01/23/2001 | US6177311 Method for making a floating gate memory with improved interpoly dielectric |
| 01/23/2001 | US6177303 Method of manufacturing a semiconductor device with a field effect transistor |
| 01/23/2001 | US6177301 Method of fabricating thin film transistors for a liquid crystal display |
| 01/23/2001 | US6177299 Transistor having substantially isolated body and method of making the same |
| 01/23/2001 | US6177296 Method for forming vertical interconnect process for silicon segments with thermally conductive epoxy preform |
| 01/23/2001 | US6176137 Pressure sensor |
| 01/23/2001 | CA2105342C Method of forming silicon carbide |
| 01/18/2001 | WO2001005205A1 Laminates for encapsulating devices |
| 01/18/2001 | WO2001004961A1 Power semiconductor devices with buried insulating regions |
| 01/18/2001 | WO2001004959A1 Single electron tunneling transistor having multilayer structure |
| 01/18/2001 | WO2001004956A1 Semiconductor device and method of manufacturing same |
| 01/18/2001 | WO2001004949A1 Nand type flash memory device |
| 01/18/2001 | WO2001004948A1 New method of forming select gate to improve reliability and performance for nand type flash memory devices |
| 01/18/2001 | WO2001004943A1 Multilayered body, method for fabricating multilayered body, and semiconductor device |
| 01/18/2001 | WO2001004939A1 Semiconductor film, liquid-crystal display using semiconductor film, and method of manufacture thereof |
| 01/18/2001 | WO2000057454A3 Improved integrated oscillators and tuning circuits |
| 01/18/2001 | DE19933632A1 Verfahren zur Herstellung von Monolagen aus Silizium-Nanoclustern in Siliziumdioxid Process for the preparation of monolayers of silicon nanoclusters in silica |
| 01/18/2001 | DE19932541A1 Production of a membrane used in sensors comprises applying an n-doped epitaxial layer on the front side of a p-doped silicon substrate, and etching a recess in the rear side of the substrate |
| 01/18/2001 | DE19930583A1 Transistor with permeable base |
| 01/18/2001 | DE19930125A1 Durch Feldeffekt gesteuerte vertikale Halbleiter-Struktur Controlled by vertical field effect semiconductor structure |
| 01/18/2001 | DE10025213A1 Semiconductor device for protecting access e.g. to mobile telephone had circuit for encoding dispersion of polycrystalline substance in semiconductor element |
| 01/18/2001 | CA2342363A1 Laminates for encapsulating devices |
| 01/17/2001 | EP1069622A1 An InPSb channel HEMT on InP for RF applications |
| 01/17/2001 | EP1069621A2 Voltage controlled semiconductor device |
| 01/17/2001 | EP1069620A1 A flash memory array |
| 01/17/2001 | EP1069619A2 Semiconductor integrated circuit device, production and operation method thereof |
| 01/17/2001 | EP1069614A2 Method of fabricating an integrated circuit |
| 01/17/2001 | EP1069465A1 Tft array substrate for liquid crystal display and method of producing the same, and liquid crystal display and method of producing the same |
| 01/17/2001 | EP1069206A2 Nanoscale conductive connectors and method for making same |
| 01/17/2001 | EP1068638A1 Wafer-pair having deposited layer sealed chambers |
| 01/17/2001 | EP1068637A1 Reduced channel length lightly doped drain transistor using a sub-amorphous large tilt angle implant to provide enhanced lateral diffusion |
| 01/17/2001 | EP1068636A1 Ultra-high resolution liquid crystal display on silicon-on-sapphire |
| 01/17/2001 | EP1068149A1 Method for construction of nanotube matrix material |
| 01/17/2001 | CN2415461Y 贴片二极管 SMD diode |
| 01/17/2001 | CN1280687A Method and system for improving a transistor model |
| 01/17/2001 | CN1280388A Silicon complementary metal oxide semiconductor body contact on insulator formed by grating |
| 01/17/2001 | CN1280383A Method for producing semiconductor unit, method for producing solar cell and anodizing process equipment |
| 01/17/2001 | CN1280308A Film transistor array and its producing method |
| 01/16/2001 | US6175481 Semiconductor device having a deactivation fuse |
| 01/16/2001 | US6175395 Liquid crystal display device having light shielding layer forms over a TFT and form of an acrylic resin having carbon black particles with diameter of 1mm |
| 01/16/2001 | US6175394 Capacitively coupled field effect transistors for electrostatic discharge protection in flat panel displays |
| 01/16/2001 | US6175393 Active-matrix type liquid crystal display device and method of compensating for defective pixel |
| 01/16/2001 | US6175348 Electro-optical device |
| 01/16/2001 | US6175143 Schottky barrier |
| 01/16/2001 | US6175140 Semiconductor device using a shallow trench isolation |
| 01/16/2001 | US6175137 Monolithic resistor having dynamically controllable impedance and method of manufacturing the same |
| 01/16/2001 | US6175136 Method of forming CMOS device with improved lightly doped drain structure |
| 01/16/2001 | US6175135 Trench contact structure of silicon on insulator |
| 01/16/2001 | US6175134 Thin film transistors |
| 01/16/2001 | US6175133 Flash memory cell and method of fabricating the same |
| 01/16/2001 | US6175127 Stack capacitor having a diffusion barrier |
| 01/16/2001 | US6175123 Semiconductor devices with quantum-wave interference layers |
| 01/16/2001 | US6174807 Method of controlling gate dopant penetration and diffusion in a semiconductor device |
| 01/16/2001 | US6174794 Method of making high performance MOSFET with polished gate and source/drain feature |
| 01/16/2001 | US6174792 Method of manufacturing a semiconductor device |
| 01/16/2001 | US6174779 Method for manufacturing a lateral bipolar transistor |
| 01/16/2001 | US6174778 Method of fabricating metal oxide semiconductor |
| 01/16/2001 | US6174773 Method of manufacturing vertical trench misfet |
| 01/16/2001 | US6174772 Optimal process flow of fabricating nitride spacer without inter-poly oxide damage in split gate flash |
| 01/16/2001 | US6174763 Three-dimensional SRAM trench structure and fabrication method therefor |
| 01/16/2001 | US6174759 Method of manufacturing a semiconductor device |
| 01/16/2001 | US6174754 Methods for formation of silicon-on-insulator (SOI) and source/drain-on-insulator(SDOI) transistors |
| 01/16/2001 | US6174751 Method of manufacturing resin encapsulated semiconductor device |
| 01/16/2001 | US6174745 Method for making a TFT active matrix for a protection system screen |
| 01/16/2001 | US6174416 Micromechanical component production method |
| 01/16/2001 | CA2156727C High saturation current, low leakage current fermi threshold field effect transistor |
| 01/11/2001 | WO2001003263A1 Light and/or electron element |
| 01/11/2001 | WO2001003208A1 Nanoscopic wire-based devices, arrays, and methods of their manufacture |
| 01/11/2001 | WO2001003204A1 Diode comprising a metal semiconductor contact and a method for the production thereof |
| 01/11/2001 | WO2001003203A1 Non-volatile semiconductor memory cell, comprising a separate tunnel window and a method for producing the same |
| 01/11/2001 | WO2001003202A1 Vertical semiconductor device and method for producing the same |
| 01/11/2001 | WO2001003201A1 Lateral thin-film silicon-on-insulator (soi) device having a gate electrode and a field plate electrode |
| 01/11/2001 | WO2001003199A2 Vertical semiconductor structure, controlled by field-effect |
| 01/11/2001 | WO2001003198A1 Memory cell arrangement |
| 01/11/2001 | WO2001003197A1 Tunnel contact and method for the production thereof |
| 01/11/2001 | WO2001003196A1 Ferroelectric transistor |
| 01/11/2001 | WO2001003195A1 Electric semiconductor element with a contact hole |
| 01/11/2001 | WO2001003194A1 Heterojunction iii-v transistor, in particular hemt field effect transistor or heterojunction bipolar transistor |
| 01/11/2001 | WO2001003193A1 Semiconductor element |
| 01/11/2001 | WO2000021118A3 Method for producing a double gate of a vertical mosfet |
| 01/11/2001 | DE19930781A1 Diode mit Metall-Halbleiterkontakt und Verfahren zu ihrer Herstellung Diode metal-semiconductor contact and procedures for their preparation |
| 01/11/2001 | DE19930586A1 Nichtflüchtige Halbleiter-Speicherzelle mit separatem Tunnelfenster und dazugehöriges Herstellungsverfahren Non-volatile semiconductor memory cell with a separate tunnel window and associated manufacturing processes |
| 01/11/2001 | DE19929618A1 Verfahren zur Herstellung einer nichtflüchtigen Halbleiter-Speicherzelle mit separatem Tunnelfenster A method of manufacturing a nonvolatile semiconductor memory cell with a separate tunnel window |
| 01/11/2001 | DE19928761A1 Semiconducting chip has strain, displacement and/or compression stresses and forces arising during and after mounting of pressed material body kept as small as possible |