| Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143) |
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| 02/20/2001 | US6191044 Method for forming graded LDD transistor using controlled polysilicon gate profile |
| 02/20/2001 | US6191021 Method of forming a low-resistance contact on compound semiconductor |
| 02/20/2001 | US6191017 Method of forming a multi-layered dual-polysilicon structure |
| 02/20/2001 | US6191015 Method for producing a Schottky diode assembly formed on a semiconductor substrate |
| 02/20/2001 | US6190998 Method for achieving a thin film of solid material and applications of this method |
| 02/20/2001 | US6190996 Method of making an insulator for electrical structures |
| 02/20/2001 | US6190987 MOS semiconductor device and method of manufacturing the same |
| 02/20/2001 | US6190981 Method for fabricating metal oxide semiconductor |
| 02/20/2001 | US6190978 Method for fabricating lateral RF MOS devices with enhanced RF properties |
| 02/20/2001 | US6190977 Method for forming MOSFET with an elevated source/drain |
| 02/20/2001 | US6190976 Fabrication method of semiconductor device using selective epitaxial growth |
| 02/20/2001 | US6190975 Method of forming HCMOS devices with a silicon-germanium-carbon compound semiconductor layer |
| 02/20/2001 | US6190973 Method of fabricating a high quality thin oxide |
| 02/20/2001 | US6190971 Formation of 5F2 cell with partially vertical transistor and gate conductor aligned buried strap with raised shallow trench isolation region |
| 02/20/2001 | US6190970 Method of making power MOSFET and IGBT with optimized on-resistance and breakdown voltage |
| 02/20/2001 | US6190968 Method for forming EPROM and flash memory cells with source-side injection |
| 02/20/2001 | US6190966 Process for fabricating semiconductor memory device with high data retention including silicon nitride etch stop layer formed at high temperature with low hydrogen ion concentration |
| 02/20/2001 | US6190963 Forming an electrode of a ferroelectric capacitor |
| 02/20/2001 | US6190951 Method for manufacturing a liquid crystal display apparatus |
| 02/20/2001 | US6190949 Silicon thin film, group of silicon single crystal grains and formation process thereof, and semiconductor device, flash memory cell and fabrication process thereof |
| 02/20/2001 | US6190948 Method of forming power semiconductor devices having overlapping floating field plates for improving breakdown voltage capability |
| 02/20/2001 | US6190937 Method of producing semiconductor member and method of producing solar cell |
| 02/20/2001 | US6190933 Monolithic |
| 02/20/2001 | US6190926 Yield enhancement technique for integrated circuit processing to reduce effects of undesired dielectric moisture retention and subsequent hydrogen out-diffusion |
| 02/20/2001 | US6190788 Having a high crack-forming thickness limit; from a reaction product of a polysilazane compound and a dialkylalkanolamine |
| 02/20/2001 | US6190179 Method of making a field effect transistor having a channel in an epitaxial silicon layer |
| 02/20/2001 | CA2202003C Method for production of soi substrate by pasting and soi substrate |
| 02/15/2001 | WO2001011700A1 System comprising a transistor function |
| 02/15/2001 | WO2001011695A1 Double recessed transistor |
| 02/15/2001 | WO2001011693A1 High power rectifier |
| 02/15/2001 | WO2001011692A1 Product with semiconductor comprising a schottky contact |
| 02/15/2001 | WO2001011691A1 Memory cell with self-aligned floating gate and separate select gate, and fabrication process |
| 02/15/2001 | WO2001011690A1 Unipolar field-effect transistor |
| 02/15/2001 | WO2001011689A1 Component with monoelectron elements and quantum device, industrial method for producing the same and multi-chamber reactor for carrying out said method |
| 02/15/2001 | WO2001011685A1 Double triggering mechanism for achieving faster turn-on |
| 02/15/2001 | WO2001011683A1 Method for providing a dopant level for polysilicon for flash memory devices |
| 02/15/2001 | WO2001011681A1 Mosfet device having recessed gate-drain shield and method |
| 02/15/2001 | WO2001011675A1 Method to form narrow structures using double-damascene process |
| 02/15/2001 | WO2001011669A1 Salicide process for mosfet integrated circuit |
| 02/15/2001 | WO2001011668A1 Method of manufacturing semiconductor device |
| 02/15/2001 | WO2000049643A3 Gate insulator comprising high and low dielectric constant parts |
| 02/15/2001 | DE19938209A1 Halbleiteranordnung und Verfahren zur Herstellung A semiconductor device and method for producing |
| 02/15/2001 | DE19938206A1 Micro-mechanical rotational acceleration sensor has an oscillating mass fixed at its center with an array of differential measurement capacitors for determination of acceleration directly rather than using time differentiation |
| 02/15/2001 | DE19933565A1 Semiconductor device for CCD, CMOS memory or logic gates |
| 02/15/2001 | DE19931124C1 Speicherzellenanordnung mit einem ferroelektrischen Transistor Memory cell arrangement with a ferroelectric transistor |
| 02/15/2001 | DE10024297A1 Semiconducting memory device has replacement word lines with minimum distance between replacement word lines greater than minimum distance between normal word lines |
| 02/14/2001 | EP1076366A1 Bidirectional switch with improved switching performances |
| 02/14/2001 | EP1076365A1 Sensitive static bidirectional switch |
| 02/14/2001 | EP1076364A2 Power semiconductor device |
| 02/14/2001 | EP1076363A2 High voltage semiconductor device |
| 02/14/2001 | CN1284204A Field effect transistor |
| 02/14/2001 | CN1284082A Self-addressable self-assembling microelectronic integrated systems, component devices, mechanisms, methods, and procedures for molecular biological analysis and diagnostics |
| 02/14/2001 | CN1283870A DRAM unit able to reduct leakage of transfering device, and its mfg. tech |
| 02/13/2001 | US6188614 Structure of a channel write/erase flash memory cell and manufacturing method and operating method thereof |
| 02/13/2001 | US6188609 Ramped or stepped gate channel erase for flash memory application |
| 02/13/2001 | US6188607 Integrated circuit memory having divided-well architecture |
| 02/13/2001 | US6188600 Memory structure in ferroelectric nonvolatile memory and readout method therefor |
| 02/13/2001 | US6188555 Device for limiting alternating electric currents, in particular in the event of a short circuit |
| 02/13/2001 | US6188452 Active matrix liquid crystal display and method of manufacturing same |
| 02/13/2001 | US6188267 Normally conducting dual thyristor |
| 02/13/2001 | US6188138 Bumps in grooves for elastic positioning |
| 02/13/2001 | US6188137 Ohmic electrode structure, semiconductor device including such ohmic electrode structure, and method for producing such semiconductor device |
| 02/13/2001 | US6188126 Vertical interconnect process for silicon segments |
| 02/13/2001 | US6188123 Semiconductor element having vertical discrete bipolar transistor and semiconductor device having same |
| 02/13/2001 | US6188121 High voltage capacitor |
| 02/13/2001 | US6188120 Method and materials for through-mask electroplating and selective base removal |
| 02/13/2001 | US6188119 Semiconductor device having barrier metal layer between a silicon electrode and metal electrode and manufacturing method for same |
| 02/13/2001 | US6188117 Method and device for improved salicide resistance on polysilicon gates |
| 02/13/2001 | US6188115 Semiconductor device with a conductive layer of small conductive resistance |
| 02/13/2001 | US6188114 Method of forming an insulated-gate field-effect transistor with metal spacers |
| 02/13/2001 | US6188113 High voltage transistor with high gated diode breakdown, low body effect and low leakage |
| 02/13/2001 | US6188111 Dual gate semiconductor device for shortening channel length |
| 02/13/2001 | US6188109 Semiconductor device having a sense electrode |
| 02/13/2001 | US6188108 Thin film transistor and a fabricating method thereof |
| 02/13/2001 | US6188107 High performance transistor fabricated on a dielectric film and method of making same |
| 02/13/2001 | US6188106 MOSFET having a highly doped channel liner and a dopant seal to provide enhanced device properties |
| 02/13/2001 | US6188105 High density MOS-gated power device and process for forming same |
| 02/13/2001 | US6188104 Trench DMOS device having an amorphous silicon and polysilicon gate |
| 02/13/2001 | US6188103 Method of forming sharp beak of poly by nitrogen implant to improve erase speed for split-gate flash |
| 02/13/2001 | US6188102 Non-volatile semiconductor memory device having multiple different sized floating gates |
| 02/13/2001 | US6188101 Flash EPROM cell with reduced short channel effect and method for providing same |
| 02/13/2001 | US6188092 Solid imaging device having an antifuse element and method of making the same |
| 02/13/2001 | US6188085 Thin film transistor and a method of manufacturing thereof |
| 02/13/2001 | US6188083 Diodes with quantum-wave interference layers |
| 02/13/2001 | US6188082 Diodes with quantum-wave interference layers |
| 02/13/2001 | US6188081 Fabrication process and structure of the metal-insulator-semiconductor-insulator-metal (MISIM) multiple-differential-resistance (MNDR) device |
| 02/13/2001 | US6187689 Manufacture of semiconductor device with fine patterns |
| 02/13/2001 | US6187686 High degree of etching selectivity between the platinum layer and the mask layer can thus be achieved thereby reducing sidewall erosion and residue generation. |
| 02/13/2001 | US6187676 Integrated circuit insulated electrode forming methods using metal silicon nitride layers, and insulated electrodes so formed |
| 02/13/2001 | US6187675 Method for fabrication of a low resistivity MOSFET gate with thick metal silicide on polysilicon |
| 02/13/2001 | US6187674 Manufacturing method capable of preventing corrosion and contamination of MOS gate |
| 02/13/2001 | US6187657 Dual material gate MOSFET technique |
| 02/13/2001 | US6187656 CVD-based process for manufacturing stable low-resistivity poly-metal gate electrodes |
| 02/13/2001 | US6187645 Method for manufacturing semiconductor device capable of preventing gate-to-drain capacitance and eliminating birds beak formation |
| 02/13/2001 | US6187643 Simplified semiconductor device manufacturing using low energy high tilt angle and high energy post-gate ion implantation (PoGI) |
| 02/13/2001 | US6187642 Method and apparatus for making mosfet's with elevated source/drain extensions |
| 02/13/2001 | US6187641 Lateral MOSFET having a barrier between the source/drain region and the channel region using a heterostructure raised source/drain region |
| 02/13/2001 | US6187636 Flash memory device and fabrication method thereof |
| 02/13/2001 | US6187635 Channel hot electron programmed memory device having improved reliability and operability |
| 02/13/2001 | US6187633 Novel o/n/sion/o structure, forming a silicon oxynitride layer on the silicon nitride layer. |