Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
03/2001
03/15/2001WO2001018876A1 Bipolar mosfet device
03/15/2001WO2001018875A1 Thyristors and their manufacture
03/15/2001WO2001018874A1 Insulated base transistor
03/15/2001WO2001018873A1 Mos transistor and method for producing the same
03/15/2001WO2001018872A1 SiC WAFER, SiC SEMICONDUCTOR DEVICE, AND PRODUCTION METHOD OF SiC WAFER
03/15/2001WO2001018871A1 Method for producing an edge termination, which is capable of handling high voltages, in a base material wafer prefabricated according to the principle of lateral charge compensation
03/15/2001WO2001018870A2 Charge compensating semiconductor device and method for the production thereof
03/15/2001WO2001018869A2 Semiconductor element for high blocking voltages during a simultaneously low closing resistance and method for the production thereof
03/15/2001WO2001018866A1 Strongly textured atomic ridges and dots
03/15/2001WO2001018854A1 Methods for producing uniform large-grained and grain boundary location manipulated polycrystalline thin film semiconductors using sequential lateral solidification
03/15/2001US20010000033 Tapered thickness of the dielectric regions enhances the degree of uniformity of the electric field along the sidewalls of the trenches and in the mesa; support higher blocking voltages despite a high concentration of dopants;
03/15/2001DE19944925A1 Vertical layer structure for silicon-based bipolar transistors contains one or more monolayers consisting of doping atoms
03/15/2001DE19942879A1 Halbleiterelement und Verfahren zur Herstellung des Halbleiterbauelements Semiconductor element and method of manufacturing the semiconductor device
03/15/2001DE19941042A1 Verfahren zur Herstellung oberflächenmikromechanischer Strukturen durch Ätzung mit einem dampfförmigen, flußsäurehaltigen Ätzmedium A process for producing surface micromechanical structures by etching with a vapor, hydrofluoric acid etching medium
03/15/2001DE19940758A1 Verfahren zur Herstellung eines HF-FET und HF-FET A process for the preparation of a FET RF and HF-FET
03/15/2001DE19939092A1 Memory region for integrated semiconductor memory
03/15/2001DE19924571C2 Verfahren zur Herstellung eines Doppel-Gate-MOSFET-Transistors A method for producing a double gate MOSFET transistor
03/15/2001DE10038686A1 Semiconductor ceramic having an average particle size comprises barium titanate as the main component, and a small amount of sodium
03/15/2001DE10019250A1 Bipolarer Hochfrequenztransistor Radio-frequency bipolar transistor
03/15/2001CA2383901A1 A pressure transducer
03/14/2001EP1083608A1 Field-effect semiconductor device
03/14/2001EP1083607A2 High voltage SOI semiconductor device
03/14/2001EP1083606A1 Field-effect semiconductor device
03/14/2001EP1083605A2 Field effect transistor with double sided airbridge
03/14/2001EP1083590A1 Method for producing thin film semiconductor device
03/14/2001EP1083431A1 Method for compensating the position offset of a capacitive inertial sensor, andcapacitive inertial sensor
03/14/2001EP1083430A1 Semiconductor integrated inertial sensor with calibration microactuator
03/14/2001EP1083144A1 Micro-electromechanical structure insensitive to mechanical stresses.
03/14/2001EP1082815A1 Smart power component
03/14/2001EP1082764A1 Semiconductor current-switching device having operational enhancer and method therefor
03/14/2001EP1082763A1 Nrom cell with improved programming, erasing and cycling
03/14/2001EP1082760A1 Method of manufacturing a floating gate field-effect transistor
03/14/2001EP1082759A1 Method of manufacturing a mis field-effect transistor
03/14/2001EP1082758A2 Method of manufacturing a semiconductor device comprising a bipolar transistor
03/14/2001CN1287689A Affinity based self-assembly systems and devices for photonic and electronic applications
03/14/2001CN1287685A Semiconductor device, substrate for electro-optical device, electro-optical device, electronic device, and projection display
03/14/2001CN1287387A Active matrix display device and electrooptical element
03/14/2001CN1287362A Non-volatile semiconductor memory
03/14/2001CN1287333A Improved method for simulating silicon device on insulator
03/14/2001CN1287287A Active matrix liquid crystal display element and its producing method
03/13/2001US6201735 Electrically erasable and programmable nonvolatile semiconductor memory
03/13/2001US6201591 Method of manufacturing a display device including a peripheral circuit area and a pixel area on the same substrate
03/13/2001US6201291 Semiconductor device and method of manufacturing such a device
03/13/2001US6201284 Multi-axis acceleration sensor and manufacturing method thereof
03/13/2001US6201283 Field effect transistor with double sided airbridge
03/13/2001US6201281 Semiconductor device and method for producing the same
03/13/2001US6201280 Transistor of SIC
03/13/2001US6201279 Semiconductor component having a small forward voltage and high blocking ability
03/13/2001US6201278 Trench transistor with insulative spacers
03/13/2001US6201274 Semiconductor device with no step between well regions
03/13/2001US6201271 Where a mixed oxide film of platinum and rhodium is formed as an upper electrode in direct contact with a ferroelectric film
03/13/2001US6201269 Junction field effect transistor and method of producing the same
03/13/2001US6201268 Output structure of charge-coupled device and method for fabricating the same
03/13/2001US6201260 Thin film transistor and method of manufacturing the same
03/13/2001US6201258 Hot carrier transistors utilizing quantum well injector for high current gain
03/13/2001US6200906 Stepped photoresist profile and opening formed using the profile
03/13/2001US6200885 By providing a substrate such as indium phosphide, gallium arsenide, or indium gallium aresnide phosphide; treating with sulfuric acid, and coating an aluminum layer to form a schottky barrier layer and forming metal on barrier layer
03/13/2001US6200877 Method of forming a charge storage electrode having a selective hemispherical grains silicon film in a semiconductor device
03/13/2001US6200871 High performance self-aligned silicide process for sub-half-micron semiconductor technologies
03/13/2001US6200868 Insulated gate type semiconductor device and process for producing the device
03/13/2001US6200866 Use of silicon germanium and other alloys as the replacement gate for the fabrication of MOSFET
03/13/2001US6200865 Use of sacrificial dielectric structure to form semiconductor device with a self-aligned threshold adjust and overlying low-resistance gate
03/13/2001US6200864 Method of asymmetrically doping a region beneath a gate
03/13/2001US6200863 Process for fabricating a semiconductor device having assymetric source-drain extension regions
03/13/2001US6200862 Mask for asymmetrical transistor formation with paired transistors
03/13/2001US6200859 Method of fabricating a split-gate flash memory
03/13/2001US6200858 Floating gate sidewall structure for the suppression of bird's beak
03/13/2001US6200843 High-voltage, high performance FETs
03/13/2001US6200841 MOS transistor that inhibits punchthrough and method for fabricating the same
03/13/2001US6200839 Methods of forming thin film transistors
03/13/2001US6200838 Compound semiconductor device and method of manufacturing the same
03/13/2001US6200837 Method of manufacturing thin film transistor
03/13/2001US6200836 Using oxide junction to cut off sub-threshold leakage in CMOS devices
03/13/2001US6200835 Methods of forming conductive polysilicon lines and bottom gated thin film transistors, and conductive polysilicon lines and thin film transistors
03/13/2001US6200734 Method for fabricating semiconductor devices
03/13/2001US6199533 Pilot valve controlled three-way fuel injection control valve assembly
03/08/2001WO2001017041A1 Method for forming a patterned semiconductor film
03/08/2001WO2001017035A1 Quantum dot thermoelectric materials and devices
03/08/2001WO2001017032A1 Capacitor structure
03/08/2001WO2001017031A1 Easy shrinkable novel non-volatile semiconductor memory cell utilizing split dielectric floating gate and method for making same
03/08/2001WO2001017030A1 Non-volatile memory structure for twin-bit storage and methods of making same
03/08/2001WO2001017029A1 Transistor for an electronically driven display
03/08/2001WO2001017028A1 Lateral thin-film silicon-on-insulator (soi) pmos device having a drain extension region
03/08/2001WO2001017027A1 A parallel plate diode
03/08/2001WO2001017025A2 Semi-conductor component as a delaying device and use thereof.
03/08/2001WO2001017023A1 Nonvolatile memory having high gate coupling capacitance
03/08/2001WO2001017021A1 Encapsulated tungsten gate mos transistor and memory cell and method of making same
03/08/2001WO2001017018A1 8 bit per cell non-volatile semiconductor memory structure utilizing trench technology and dielectric floating gate
03/08/2001WO2001017017A1 Nonvolatile ferroelectric memory and method of manufacture thereof
03/08/2001WO2001017009A1 Method to fabricate a mosfet
03/08/2001WO2001017008A1 Hf-fet and method for producing the same
03/08/2001WO2001017002A1 Layer structure for bipolar transistors and method for the production thereof
03/08/2001WO2001016960A1 1 transistor cell for eeprom application
03/08/2001WO2001016959A1 Floating gate storage cell
03/08/2001WO2001016581A1 Efficient radiation coupling to quantum-well radiation-sensing array via evanescent waves
03/08/2001WO2000074130A9 Discrete schottky diode device with reduced leakage current
03/08/2001WO2000062331A3 Semiconductor heterostructures with crystalline silicon carbide alloyed with germanium
03/08/2001DE19940278A1 Schichtstruktur für bipolare Transistoren und Verfahren zu deren Herstellung Layer structure for bipolar transistors and methods for their preparation
03/08/2001DE10031624A1 Manufacture of FET transistor with elevated source and drain regions and minimal channel length, overlaps regions of differing dopant levels at each end of gate
03/08/2001DE10020150A1 Semiconductor SRAM with reduced storage cell area and improved data retention interval has negative resistance section with tunnel insulating layer formed on active p-type region