Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
06/2008
06/03/2008US7381905 Structure for fixing an electronic device to a substrate
06/03/2008US7381643 Wiring structure forming method and semiconductor device
06/03/2008US7381607 Method of forming a spiral inductor in a semiconductor substrate
06/03/2008US7381592 Method of making a semiconductor device with improved heat dissipation
06/03/2008US7381591 Flip-chip adaptor package for bare die
06/03/2008US7381590 Method and device including reworkable alpha particle barrier and corrosion barrier
06/03/2008US7381575 Device and method for detecting alignment of active areas and memory cell structures in DRAM devices
06/03/2008US7381508 Correcting errors using step difference between insulating pattern and adjoining trench
06/03/2008US7381359 Method for making filled epoxy resin compositions
06/03/2008US7381283 Applying a constraining layer with windows on it that does not need to be removed after firing; simplifies procedures to lower production cost; high quality multilayer ceramics
06/03/2008US7380961 Light source coupler, illuminant device, patterned conductor, and method for manufacturing light source coupler
06/03/2008US7380584 Pump-free water-cooling system
06/01/2008CA2612973A1 Systems and methods for thermal management of lamps and luminaires using led sources
05/2008
05/30/2008CA2606161A1 Electronic apparatus
05/29/2008WO2008063473A2 Nanorobotics system
05/29/2008WO2008063380A1 Dust accumulation resistant heat sink
05/29/2008WO2008063138A2 An improved ball mounting apparatus and method
05/29/2008WO2008062844A1 Radiating resin compositions, process for producing the same, and molded article
05/29/2008WO2008062767A1 Semiconductor chip provided with side surface electrode, method for manufacturing the semiconductor chip, and three-dimensional mounting module wherein the semiconductor chip is laminated
05/29/2008WO2008062723A1 Inorganic anion exchanger composed of bismuth compound and resin composition for electronic component encapsulation using the same
05/29/2008WO2008061980A1 Explosion-proof module structure for power components, particularly power semiconductor components, and production thereof
05/29/2008WO2008061864A1 Wire and solder bond forming methods
05/29/2008WO2008061554A1 Electronic, in particular microelectronic, functional group and method for its production
05/29/2008WO2008021489A3 Integrated circuit chip with repeater flops and method for automated design of same
05/29/2008WO2008007256A3 Semiconductor device for low-power applications and a method of manufacturing thereof
05/29/2008WO2008001283A3 Flip-chip interconnection with formed couplings
05/29/2008WO2007090664A8 Power electronics assembly
05/29/2008US20080124918 Chip structure and process for forming the same
05/29/2008US20080124843 Resin for sealing semiconductor device, resin-sealed semiconductor device and the method of manufacturing the semiconductor device
05/29/2008US20080124822 Thermosetting resin composition and photo-semiconductor encapsulant
05/29/2008US20080124457 Transparent conductive film
05/29/2008US20080123385 Interconnecting bit lines in memory devices for multiplexing
05/29/2008US20080123299 Circuit Device and Manufacturing Method of the Same
05/29/2008US20080122476 Test structure with TDDB test pattern
05/29/2008US20080122126 Bose-Einstein Condensate Bottling Plant
05/29/2008US20080122125 Methods to reduce the critical dimension of semiconductor devices and partially fabricated semiconductor devices having reduced critical dimensions
05/29/2008US20080122124 Overlay mark, method for forming the same and application thereof
05/29/2008US20080122123 Compact LED with a self-formed encapsulating dome
05/29/2008US20080122122 Semiconductor package with encapsulant delamination-reducing structure and method of making the package
05/29/2008US20080122121 Semiconductor device having a interlayer insulation film with low dielectric constant and high mechanical strength
05/29/2008US20080122120 Electronic component, manufacturing method of the electronic component, electronic component assembly body, and electronic device
05/29/2008US20080122119 Method and apparatus for creating rfid devices using masking techniques
05/29/2008US20080122118 Silica nanoparticles thermoset resin compositions
05/29/2008US20080122117 Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud-bumps
05/29/2008US20080122116 Method of forming metal layer wiring structure on backside of wafer, metal layer wiring structure formed using the method, method of stacking chip package, and chip package stack structure formed using the method
05/29/2008US20080122115 Three-dimensional Wafer Stacking with Vertical Interconnects
05/29/2008US20080122114 Bonding structures and methods of forming bonding structures
05/29/2008US20080122113 Semiconductor device assemblies and systems including at least one conductive pathway extending around a side of at least one semiconductor device and methods for forming the same
05/29/2008US20080122112 Semiconductor device and method for fabricating the same
05/29/2008US20080122111 Semiconductor device and fabricating method thereof
05/29/2008US20080122110 Contact aperture and contact via with stepped sidewall and methods for fabrication thereof
05/29/2008US20080122109 Porous and dense hybrid interconnect structure and method of manufacture
05/29/2008US20080122108 Rotation joint and semiconductor device having the same
05/29/2008US20080122107 Poly silicon hard mask
05/29/2008US20080122106 Method to generate airgaps with a template first scheme and a self aligned blockout mask
05/29/2008US20080122105 Structure for preventing pad peeling and method of fabricating the same
05/29/2008US20080122104 Damascene interconnect structure having air gaps between metal lines and method for fabricating the same
05/29/2008US20080122103 Embedded nano uv blocking barrier for improved reliability of copper/ultra low k interlevel dielectric electronic devices
05/29/2008US20080122102 Semiconductor device having oxidized metal film and manufacture method of the same
05/29/2008US20080122101 Manufacturing Method Of Semiconductor Device And Semiconductor Device Produced Therewith
05/29/2008US20080122100 Novel bond pad design to minimize dielectric cracking
05/29/2008US20080122099 Chip structure and process for forming the same
05/29/2008US20080122098 Nonvolatile semiconductor memory and method for fabricating the same
05/29/2008US20080122097 Method of forming metal wiring in semiconductor device
05/29/2008US20080122096 Methods for lateral current carrying capability improvement in semiconductor devices
05/29/2008US20080122094 Method of manufacturing semiconductor device and semiconductor device
05/29/2008US20080122093 Semiconductor device and method for manufacturing the same
05/29/2008US20080122092 Semiconductor Device and Method of Manufacturing the Same
05/29/2008US20080122090 Interconnect Structures with Liner Repair Layers and Methods for Forming Such Interconnection Structures
05/29/2008US20080122089 Interconnect structure with line resistance dispersion
05/29/2008US20080122088 Electronic Packaging Materials for Use with Low-K Dielectric-Containing Semiconductor Devices
05/29/2008US20080122087 Semiconductor device with no base member and method of manufacturing the same
05/29/2008US20080122086 Solder bump structure and method of manufacturing same
05/29/2008US20080122085 Semiconductor device and a method of manufacturing the same
05/29/2008US20080122084 Flip-chip assembly and method of manufacturing the same
05/29/2008US20080122083 Semiconductor module and method of manufacturing the same
05/29/2008US20080122082 Semiconductor device and semiconductor package containing the same
05/29/2008US20080122081 Method of fabricating electronic device having sacrificial anode, and electronic device fabricated by the same
05/29/2008US20080122080 Semiconductor die with reduced bump-to-pad ratio
05/29/2008US20080122079 Package substrate and manufacturing method thereof
05/29/2008US20080122078 Systems and methods to passivate on-die redistribution interconnects
05/29/2008US20080122077 Chip and manufacturing method and application thereof
05/29/2008US20080122076 Conductive Wiring for Semiconductor Devices
05/29/2008US20080122075 Semiconductor module with at least two substrates
05/29/2008US20080122074 Multi-chip electronic circuit module and a method of manufacturing
05/29/2008US20080122073 MEMS module package
05/29/2008US20080122072 Balanced semiconductor device packages including lead frame with floating leads and associated methods
05/29/2008US20080122071 Heat dissipating semiconductor package and fabrication method therefor
05/29/2008US20080122070 Heat dissipating semiconductor package and fabrication method therefor
05/29/2008US20080122069 Heat sink
05/29/2008US20080122068 Thermally enhanced semiconductor package
05/29/2008US20080122067 Heat spreader for an electrical device
05/29/2008US20080122066 Semiconductor device
05/29/2008US20080122065 Integrated circuit package system with pedestal structure
05/29/2008US20080122064 Semiconductor device
05/29/2008US20080122063 Semiconductor device
05/29/2008US20080122062 Wafer level package configured to compensate size difference in different types of packages
05/29/2008US20080122061 Semiconductor chip embedded in an insulator and having two-way heat extraction
05/29/2008US20080122060 Semiconductor device including corrosion resistant wiring structure
05/29/2008US20080122059 Stacked chip package structure and fabricating method thereof
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