Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
06/2008
06/24/2008US7390978 Overmolded electronic assembly and overmoldable interface component
06/24/2008US7390741 Method for fabricating semiconductor device
06/24/2008US7390736 EMI and noise shielding for multi-metal layer high frequency integrated circuit processes
06/24/2008US7390733 Method of manufacturing a semiconductor device including a protruding electrode bonded to a lead electrode
06/24/2008US7390732 Method for producing a semiconductor device with pyramidal bump electrodes bonded onto pad electrodes arranged on a semiconductor chip
06/24/2008US7390731 Method of depositing an oxide layer on a substrate and a photovoltaic cell using said substrate
06/24/2008US7390723 Alignment method of using alignment marks on wafer edge
06/24/2008US7390699 Integrated circuit die connection methods and apparatus
06/24/2008US7390698 Packaged semiconductor device and method of manufacture using shaped die
06/24/2008US7390697 Enhanced adhesion strength between mold resin and polyimide
06/24/2008US7390692 Semiconductor device and method for manufacturing the same
06/24/2008US7390680 Method to selectively identify reliability risk die based on characteristics of local regions on the wafer
06/24/2008US7390615 Integrated circuit fuse and method of opening
06/24/2008US7389805 Bonding arm swinging type bonding apparatus
06/24/2008US7389580 Method and apparatus for thin-film battery having ultra-thin electrolyte
06/19/2008WO2008073751A1 Miniature actuator integration for liquid cooling
06/19/2008WO2008073738A2 Stress-improved flip-chip semiconductor device having half-etched leadframe
06/19/2008WO2008073675A1 Method and system for extracting heat from electrical components
06/19/2008WO2008073485A2 Plastic electronic component package
06/19/2008WO2008073090A1 Lead-free solder alloy for printed circuit board assemblies for high-temperature environments
06/19/2008WO2008073084A1 An integrated circuit package and a method for dissipating heat in an integrated circuit package
06/19/2008WO2008072845A1 Heat sink and method of manufacturing the same
06/19/2008WO2008072551A1 Ic chip-mounted package and image display device using the same
06/19/2008WO2008072510A1 Semiconductor device
06/19/2008WO2008072491A1 Ic chip mounting package and process for manufacturing the same
06/19/2008WO2008072165A1 Method of manufacturing openings in a substrate, a via in a substrate, and a semiconductor device comprising such a via
06/19/2008WO2008071905A1 Chip mounting
06/19/2008WO2008071850A2 Novel nanoparticle containing siloxane polymers
06/19/2008WO2008071190A1 Electronic device and frequency converter of motor
06/19/2008WO2008070983A1 Thermal management system and method for semiconductor lighting systems
06/19/2008WO2008043012A3 Package-level electromagnetic interference shielding
06/19/2008WO2008042343A3 Plastic surface mount large area power device
06/19/2008WO2008031058A3 Self-regenerating nanotips for low-power electric propulsion (ep) cathodes
06/19/2008WO2008022901A3 Process for the collective manufacturing of electronic 3d modules
06/19/2008WO2008020391A3 Reducing stress between a substrate and a projecting electrode on the substrate
06/19/2008WO2008010121A3 Cooling semiconductor-based devices arranged in a greenhouse
06/19/2008WO2008005614A3 Chip module for complete power train
06/19/2008WO2008003051B1 Stress mitigation in packaged microchips
06/19/2008WO2007136917A3 Managed memory component
06/19/2008WO2007130643B1 Die-on-leadframe (dol) with high voltage isolation
06/19/2008WO2007119123A3 Interconnects and heat dissipators based on nanostructures
06/19/2008WO2007103961A3 Gold-bumped interposer for vertically integrated semiconductor system
06/19/2008WO2007081806A3 Interdigitated conductive lead frame or laminate lead frame for gan die
06/19/2008WO2007065117A3 Leadframes for improved moisture reliability and enhanced solderability of semiconductor devices
06/19/2008US20080146776 Semiconductor of 2,5-bis[2-(4-pentylphenyl)vinyl]-thieno(3,2-b)thiophene
06/19/2008US20080146187 Semiconductor device and electronic device
06/19/2008US20080146037 Use of a porous dielectric material as an etch stop layer for non-porous dielectric films
06/19/2008US20080146020 Top layers of metal for high performance IC's
06/19/2008US20080146018 Chip structure and method for fabrication the same
06/19/2008US20080145974 Forming a seed layer; forming a heat spreader layer on the seed layer to increase the thermal conductivity of the heat spreader layer; heat spreader layer of Aluminum Nitride is grown on the seed layer of NiTa or Alumina
06/19/2008US20080145973 Method of manufacturing wafer level chip size package
06/19/2008US20080145969 Semiconductor package and method for manufacturing the same
06/19/2008US20080145958 Monitoring of electrostatic discharge (esd) events during semiconductor manufacture using esd sensitive resistors
06/19/2008US20080145518 Element Mounting Substrate and Method for Manufacturing Same
06/19/2008US20080144366 Dual-bit memory device having trench isolation material disposed near bit line contact areas
06/19/2008US20080144298 Printed circuit board and method of manufacturing printed circuit board
06/19/2008US20080144292 Semiconductor module with heat sink and method thereof
06/19/2008US20080144287 Mounting device for high frequency microwave devices
06/19/2008US20080144048 Semiconductor device, and testing method and device for the same
06/19/2008US20080142998 Zero-order overlay targets
06/19/2008US20080142997 Metal structure
06/19/2008US20080142996 Controlling flow of underfill using polymer coating and resulting devices
06/19/2008US20080142995 Layout and process to contact sub-lithographic structures
06/19/2008US20080142994 Contact Pad And Bump Pad Arrangement for High-Lead Or Lead-Free Bumps
06/19/2008US20080142993 Flip-chip mounting substrate
06/19/2008US20080142992 Molding compound adhesion for map-molded flip-chip
06/19/2008US20080142991 Thin passivation layer on 3D devices
06/19/2008US20080142990 Three-dimensional integrated circuits with protection layers
06/19/2008US20080142989 Semiconductor device and manufacturing method of semiconductor device
06/19/2008US20080142988 Method for selective removal of damaged multi-stack bilayer films
06/19/2008US20080142987 Computer automated design system, a computer automated design method, and a semiconductor integrated circuit
06/19/2008US20080142986 Semiconductor integrated circuit
06/19/2008US20080142985 Wiring substrate with improvement in tensile strength of traces
06/19/2008US20080142984 Multi-Layer Electrode Structure
06/19/2008US20080142983 Device having contact pad with a conductive layer and a conductive passivation layer
06/19/2008US20080142982 Semiconductor constructions, semiconductor processing methods, methods of forming contact pads, and methods of forming electrical connections between metal-containing layers
06/19/2008US20080142981 Top layers of metal for high performance IC's
06/19/2008US20080142980 Top layers of metal for high performance IC's
06/19/2008US20080142979 Chip structure and process for forming the same
06/19/2008US20080142978 Chip structure and process for forming the same
06/19/2008US20080142977 Semiconductor device having a multilayer interconnection structure
06/19/2008US20080142976 Interposer and electronic device using the same
06/19/2008US20080142975 Dummy patterns and method of manufacture for mechanical strength of low k dielectric materials in copper interconnect structures for semiconductor devices
06/19/2008US20080142974 Semiconductor device and method for manufacturing same
06/19/2008US20080142973 Method of forming wiring structure and semiconductor device
06/19/2008US20080142972 Methods and systems for low interfacial oxide contact between barrier and copper metallization
06/19/2008US20080142971 Interconnect structure and method of manufacturing a damascene structure
06/19/2008US20080142970 Nanowire chemical mechanical polishing
06/19/2008US20080142969 Microball mounting method and mounting device
06/19/2008US20080142968 Structure for controlled collapse chip connection with a captured pad geometry
06/19/2008US20080142967 Semiconductor device
06/19/2008US20080142966 Metal Particles-Dispersed Composition and Flip Chip Mounting Process and Bump-Forming Process Using the Same
06/19/2008US20080142965 Chip package
06/19/2008US20080142964 Tubular-shaped bumps for integrated circuit devices and methods of fabrication
06/19/2008US20080142963 Semiconductor Package Having Non-Ceramic Based Window Frame
06/19/2008US20080142962 Integrated circuit packages, systems, and methods
06/19/2008US20080142961 Ceramic package substrate with recessed device
06/19/2008US20080142960 Circuit device with at least partial packaging and method for forming
06/19/2008US20080142959 Method and Structure for Optimizing Yield of 3-D Chip Manufacture
06/19/2008US20080142958 Hermetic seal and reliable bonding structures for 3d applications
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