Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
06/2008
06/17/2008US7387259 Hybrid card
06/17/2008US7387119 Dicing saw with variable indexing capability
06/12/2008WO2008069855A1 Wire bond integrated circuit package for high speed i/o
06/12/2008WO2008069832A2 Creating reliable via contacts for interconnect applications
06/12/2008WO2008069755A1 Integrated semiconductor outline package
06/12/2008WO2008069343A1 Semiconductor package, core layer material, buildup layer material, and encapsulation resin composition
06/12/2008WO2008069307A1 Method and apparatus for modifying integrated circuit by laser
06/12/2008WO2008069260A1 Circuit element mounting board, circuit device using the same, and air conditioner
06/12/2008WO2008069214A1 Cu ALLOY WIRING FILM, FLAT PANEL DISPLAY TFT ELEMENT USING THE Cu ALLOY WIRING FILM, AND Cu ALLOY SPUTTERING TARGET FOR MANUFACTURING THE Cu ALLOY WIRING FILM
06/12/2008WO2008069179A1 Sealing material and mounting method using the sealing material
06/12/2008WO2008069178A1 Sealing material and mounting method using the sealing material
06/12/2008WO2008069135A1 Ic chip mounting package
06/12/2008WO2008069055A1 Wiring substrate and semiconductor element mounting structure using the same
06/12/2008WO2008069044A1 Semiconductor device
06/12/2008WO2008068805A1 Semiconductor device, manufacturing method for semiconductor device, and designing method for multilayer wiring
06/12/2008WO2008068804A1 Semiconductor device and method for manufacturing same
06/12/2008WO2008068163A2 Base film for preventing the electro-static discharge of an electronic module and module producing method using the base film
06/12/2008WO2008067748A1 Method and system for redundant thermoelectric coolers for integrated dwdm transmitter/receiver
06/12/2008WO2008039717A3 Semiconductor dies and methods and apparatus to mold lock a semiconductor die
06/12/2008WO2008036810A3 Bi-layer capping of low-k dielectric films
06/12/2008WO2008007259A3 Semiconductor device and method of manufacturing a semiconductor device
06/12/2008WO2007145925B1 Method of making thermally enhanced substrate-based array package
06/12/2008WO2007127739A3 Three-dimensional packaging scheme for package types utilizing a sacrificail metal base
06/12/2008WO2007108964A3 Gaas integrated circuit device and method of attaching same
06/12/2008WO2005089450A3 Organic semiconductor devices and methods
06/12/2008US20080138979 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
06/12/2008US20080138976 Semiconductor chip and production process therefor
06/12/2008US20080138975 Method and system for fabricating semiconductor components with through interconnects and back side redistribution conductors
06/12/2008US20080138973 Microelectronic devices and methods for forming interconnects in microelectronic devices
06/12/2008US20080138953 Methods of Making Power Semiconductor Devices with Thick Bottom Oxide Layer
06/12/2008US20080138934 Method of manufacturing multi-stack package
06/12/2008US20080138701 Battery-integrated semiconductor module and method for producing the same
06/12/2008US20080137278 Memory chip and insert card having the same thereon
06/12/2008US20080136502 Semiconductor integrated circuit
06/12/2008US20080136430 Broken die detect sensor
06/12/2008US20080136049 Method of improving overlay performance in semiconductor manufacture
06/12/2008US20080136048 an epoxy resin bisphenol type ( preferably epoxy equivalent 192); novolaks phenol-fromaldehyde resin, or cresol-formaldehyde resin; triphenylphosphine or triethanolamine hardening promoter, sio2 filler, fused silica, ferrite magnetic oxides; free of conductive foreign metal particles having size 20 mu m
06/12/2008US20080136047 Semiconductor device
06/12/2008US20080136046 Electronic device and method of manufacturing the same, chip carrier, circuit board, and electronic instrument
06/12/2008US20080136045 Stacked die in die BGA package
06/12/2008US20080136044 Semiconductor package and method of manufacturing the same
06/12/2008US20080136043 Multilayer Wiring Structure, Semiconductor Device, Pattern Transfer Mask and Method for Manufacturing Multilayer Wiring Structure
06/12/2008US20080136042 Metal Wiring of Semiconductor Device and Forming Method Thereof
06/12/2008US20080136041 Structure and method of making interconnect element having metal traces embedded in surface of dielectric
06/12/2008US20080136040 Methods of Forming Electrical Interconnects Using Non-Uniformly Nitrified Metal Layers and Interconnects Formed Thereby
06/12/2008US20080136039 Interconnect assemblies, and methods of forming interconnects
06/12/2008US20080136038 Integrated circuits with conductive features in through holes passing through other conductive features and through a semiconductor substrate
06/12/2008US20080136037 Method for manufacturing semiconductor device and semiconductor device
06/12/2008US20080136036 On die signal detector without die power
06/12/2008US20080136035 polyimide or polynorbornene columns coated with copper such that the Cu attaches to a portion of the anchoring elements( epoxies) formed on the outer surfaces so that a plurality of nano interconnections are formed; reduced stresses at the interfaces, superior reliability as IC-package nano interconnect
06/12/2008US20080136034 Chip structure and process for forming the same
06/12/2008US20080136033 Packaging board and manufacturing method therefor, semiconductor module and mobile apparatus
06/12/2008US20080136032 Method for filling a contact hole and integrated circuit arrangement with contact hole
06/12/2008US20080136031 Metal line pattern of semiconductor device and method of forming the same
06/12/2008US20080136030 Semiconductor device comprising a doped metal comprising main electrode
06/12/2008US20080136029 Germanium-containing dielectric barrier for low-k process
06/12/2008US20080136028 Semiconductor constructions comprising a layer of metal over a substrate
06/12/2008US20080136027 Method of bonding wire of semiconductor package
06/12/2008US20080136026 Structure and process for wl-csp with metal cover
06/12/2008US20080136025 Semiconductor device
06/12/2008US20080136024 Semiconductor device
06/12/2008US20080136023 Method for manufacturing semiconductor device and semiconductor device
06/12/2008US20080136022 Direct via wire bonding and method of assembling the same
06/12/2008US20080136021 Method of manufacturing hybrid structure of multi-layer substrates and hybrid structure thereof
06/12/2008US20080136020 Semiconductor device and method of manufacturing the same
06/12/2008US20080136019 Solder Bump/Under Bump Metallurgy Structure for High Temperature Applications
06/12/2008US20080136018 Function Element and Manufacturing Method Thereof, and Function Element Mounting Structure
06/12/2008US20080136017 Semiconductor device, method for manufacturing the same, and semiconductor device mounting structure
06/12/2008US20080136016 Packaged integrated circuit with enhanced thermal dissipation
06/12/2008US20080136015 High power semiconductor device
06/12/2008US20080136014 Semiconductor package and method for manufacturing the same
06/12/2008US20080136013 Multilayer substrate and method of manufacturing the same
06/12/2008US20080136012 Imagine sensor package and forming method of the same
06/12/2008US20080136011 Semiconductor device
06/12/2008US20080136010 Integrated circuit package with improved power signal connection
06/12/2008US20080136009 Semiconductor device with hollow structure
06/12/2008US20080136008 Stack package and stack packaging method
06/12/2008US20080136007 Stacked integrated circuit package-in-package system
06/12/2008US20080136006 Stacked integrated circuit package-in-package system
06/12/2008US20080136005 Stackable integrated circuit package system
06/12/2008US20080136004 Multi-chip package structure and method of forming the same
06/12/2008US20080136003 Multi-layer semiconductor package
06/12/2008US20080136002 Multi-chips package and method of forming the same
06/12/2008US20080136001 Carrierless chip package for integrated circuit devices, and methods of making same
06/12/2008US20080136000 Micromechanical Component Having Multiple Caverns, and Manufacturing Method
06/12/2008US20080135999 Package device
06/12/2008US20080135998 Method For Encapsulating A Device In A Microcavity
06/12/2008US20080135997 Wire bond interconnection
06/12/2008US20080135996 Lead frame
06/12/2008US20080135995 Electronic component
06/12/2008US20080135994 LDO Regulator with Ground Connection Through Package Bottom
06/12/2008US20080135993 Lead frame of through-hole light emitting diode
06/12/2008US20080135992 Semiconductor device having plurality of leads
06/12/2008US20080135991 Semiconductor device package featuring encapsulated leadframe with projecting bumps or balls
06/12/2008US20080135990 Stress-improved flip-chip semiconductor device having half-etched leadframe
06/12/2008US20080135989 Integrated circuit package system employing structural support
06/12/2008US20080135987 Gate conductor structure
06/12/2008US20080135986 Method of forming pre-metal dielectric layer of semiconductor device
06/12/2008US20080135985 Two-Step Oxidation Process For Semiconductor Wafers
06/12/2008US20080135983 Nanolaminate-structure dielectric film forming method