Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
06/2008
06/26/2008US20080150153 Single mask via method and device
06/26/2008US20080150151 Multilayered Interconnect Structure and Method for Fabricating the Same
06/26/2008US20080150150 System and method for filling vias
06/26/2008US20080150149 Redundant micro-loop structure for use in an intergrated circuit physical design process and method of forming the same
06/26/2008US20080150148 Methods of patterning a deposit metal on a substrate
06/26/2008US20080150147 High surface area aluminum bond pad for through-wafer connections to an electronic package
06/26/2008US20080150146 Semiconductor device and method of fabricating the same
06/26/2008US20080150145 Adhesion and electromigration performance at an interface between a dielectric and metal
06/26/2008US20080150144 Guard ring in semiconductor device and fabricating method thereof
06/26/2008US20080150143 Semiconductor device pad having the same voltage level as that of a semiconductor substrate
06/26/2008US20080150142 Multilevel wiring, laminated aluminum wiring, semiconductor device and manufacturing method of the same
06/26/2008US20080150141 Manufacturing method for an integrated semiconductor structure and corresponding semiconductor structure
06/26/2008US20080150140 Semiconductor device and method of manufacturing the same
06/26/2008US20080150139 Semiconductor Device and Method of Manufacturing the Same
06/26/2008US20080150138 Process integration scheme to lower overall dielectric constant in BEoL interconnect structures
06/26/2008US20080150137 Interconnect Capping Layer and Method of Fabrication
06/26/2008US20080150136 Integrated circuit having a metal element
06/26/2008US20080150135 Mounting method for semiconductor parts on circuit substrate
06/26/2008US20080150134 Semiconductor device
06/26/2008US20080150133 Semiconductor Chip Assembly And Fabrication Method Therefor
06/26/2008US20080150132 Stack up pcb substrate for high density interconnect packages
06/26/2008US20080150131 Semiconductor device manufactured by reducing hillock formation in metal interconnects
06/26/2008US20080150130 Structure of dielectric layers in built-up layers of wafer level package
06/26/2008US20080150129 Transceiver Device
06/26/2008US20080150128 Heat dissipating chip structure and fabrication method thereof and package having the same
06/26/2008US20080150127 Microelectronic package, method of manufacturing same, and system containing same
06/26/2008US20080150126 Light emitting diode module with heat dissipation device
06/26/2008US20080150125 Thermal management of dies on a secondary side of a package
06/26/2008US20080150124 Semiconductor Device Comprising A Plastic Housing, A Semiconductor Chip and an Interposer, and Method For Producing the Same
06/26/2008US20080150123 Semiconductor Package With Rigid And Flexible Circuits
06/26/2008US20080150122 Routing density through asymmetric array of vias
06/26/2008US20080150121 Microelectronic assemblies having compliancy and methods therefor
06/26/2008US20080150120 Semiconductor device and method of producing the same
06/26/2008US20080150119 Integrated circuit package system employing mold flash prevention technology
06/26/2008US20080150118 Method of Manufacturing a Semiconductor Packages and Packages Made
06/26/2008US20080150117 Stacked-type semiconductor device package
06/26/2008US20080150116 Semiconductor package on package having plug-socket type wire connection between packages
06/26/2008US20080150115 Semiconductor Device
06/26/2008US20080150114 Stacking packages with alignment elements
06/26/2008US20080150113 Enabling uniformity of stacking process through bumpers
06/26/2008US20080150112 Thermal spacer for stacked die package thermal management
06/26/2008US20080150111 Memory device
06/26/2008US20080150110 Semiconductor package structure and method for manufacturing the same
06/26/2008US20080150109 Electronic component
06/26/2008US20080150108 Semiconductor package and method for manufacturing same
06/26/2008US20080150107 Flip chip in package using flexible and removable leadframe
06/26/2008US20080150106 Inverted lf in substrate
06/26/2008US20080150105 Power Semiconductor Component Stack Using Lead Technology with Surface-Mountable External Contacts and a Method for Producing the Same
06/26/2008US20080150104 Leadframe with different topologies for mems package
06/26/2008US20080150103 Multi-Die Ic Package and Manufacturing Method
06/26/2008US20080150102 Semiconductor device and manufacturing method of semiconductor device
06/26/2008US20080150101 Microelectronic packages having improved input/output connections and methods therefor
06/26/2008US20080150100 Ic package encapsulating a chip under asymmetric single-side leads
06/26/2008US20080150098 Multi-chip package
06/26/2008US20080150097 Semiconductor device with reduced power noise
06/26/2008US20080150096 Multi-chip module, manufacturing method thereof, mounting structure of multi-chip module, and manufacturing method of mounting structure
06/26/2008US20080150095 Semiconductor device package
06/26/2008US20080150094 Flip chip shielded RF I/O land grid array package
06/26/2008US20080150093 Shielded stacked integrated circuit package system
06/26/2008US20080150091 MULTIPLE PATTERNING USING PATTERNABLE LOW-k DIELECTRIC MATERIALS
06/26/2008US20080150089 Semiconductor device having through vias and method of manufacturing the same
06/26/2008US20080150088 Method for incorporating existing silicon die into 3d integrated stack
06/26/2008US20080150087 Semiconductor chip shape alteration
06/26/2008US20080150080 Protective Diode for Protecting Semiconductor Switching Circuits from Electrostatic Discharges
06/26/2008US20080150064 Plastic electronic component package
06/26/2008US20080150063 Process for making contact with and housing integrated circuits
06/26/2008US20080150042 Integrated circuit system with memory system
06/26/2008US20080150020 Trenched Shield Gate Power Semiconductor Devices and Methods of Manufacture
06/26/2008US20080149993 Nonvolatile semiconductor memory
06/26/2008US20080149937 Connection structure, electro-optical device, and method for production of electro-optical device
06/26/2008US20080149927 Semiconductor device, method and apparatus for testing same, and method for manufacturing semiconductor device
06/26/2008US20080149926 Semiconductor device having test pattern for measuring epitaxial pattern shift and method for fabricating the same
06/26/2008US20080149925 Semiconductor device for measuring an overlay error, method for measuring an overlay error, lithographic apparatus and device manufacturing method
06/26/2008US20080148563 Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board
06/26/2008DE202008004943U1 Kühlmodul ohne Grundplatte Cooling module without base plate
06/26/2008DE202007002215U1 Integrierter Pegelanpassungsbaustein mit integrierter Anschlussüberwachung Integrated level adjustment device with integrated connection monitoring
06/26/2008DE19720275B4 Substrat für eine Halbleiteranordnung, Herstellungsverfahren für dasselbe und eine das Substrat verwendende stapelbare Halbleiteranordnung Substrate for a semiconductor device manufacturing method thereof, and a stackable semiconductor device, the substrate used
06/26/2008DE112005000747T5 Polymer-Dielektrika zur Speicherelement-Array-Verbindung Polymer dielectrics for memory element array connection
06/26/2008DE112005000446T5 Paket mit piezoelektrischem Resonatorelement und piezoelektrischer Resonator Package with piezoelectric resonator and piezoelectric resonator
06/26/2008DE10211926B4 Wärmeableitungsanordnung eines integrierten Schaltkreises (ICs) Heat dissipation arrangement of an integrated circuit (IC)
06/26/2008DE102007058698A1 Verbessertes Kugelrasterarraygehäuse Improved ball grid array housing
06/26/2008DE102007057370A1 Elektronisches Bauelement Electronic component
06/26/2008DE102007055403A1 Wafer-Level-Package mit Chipaufnahmehohlraum und Verfahren desselben Same wafer-level package with die receiving cavity and procedures
06/26/2008DE102007034402A1 Halbleiterpackung und Herstellungsverfahren dafür A semiconductor package and fabrication method thereof
06/26/2008DE102007034342A1 Halbleitervorrichtung mit Leistungshalbleiter A semiconductor device having power semiconductor
06/26/2008DE102007019122B3 Method for processing semiconductor wafer by epitaxial step, involves forming slot structure in evacuated surface of semiconductor wafer before epitaxial step, where slot structure has recessed test structure
06/26/2008DE102007003821A1 Transistor clamping device for transistor, has holding down plate that is provided between maintaining block, transistor, and spring that is fixed on transistor such that constant pressure is executed
06/26/2008DE102007002820B3 Method for monitoring breakout of p-n-junctions in semiconductor components, involves integrating photosensitive electronic component in environment of p-n-junction being monitored in semiconductor component
06/26/2008DE102006060801A1 Chip card module manufacturing involves providing paper carrier with two sides, where structured starter layer with conductive particles is applied on one side of carrier
06/26/2008DE102006060629A1 Elektrisches Bauelement Electrical component
06/26/2008DE102006060533A1 Verfahren zur Herstellung einer ersten Schicht mit einer elektrischen Leitung und Anordnung mit einer Kontaktschicht A process for preparing a first layer with an electrical line and arrangement with a contact layer
06/26/2008DE102006060484A1 Halbleiterbauelement mit einem Halbleiterchip und Verfahren zur Herstellung desselben Of the same semiconductor device with a semiconductor chip and method for producing
06/26/2008DE102006060432A1 Elektrisches Bauelement sowie Außenkontakt eines elektrischen Bauelements Electrical component as well as external contact of an electrical component
06/26/2008DE102006060429A1 Electrical components, has leadframe structure, which is provided as electrical connection of component and another leadframe structure has conducting is fixed on one of two chips
06/26/2008DE102006060171A1 Cooling device for cooling microelectronic component, particularly processor cooling device, comprises base plate, which is provided for thermal contact of microelectronic component with contact surface
06/26/2008DE102006059994A1 Optoelektronisches Halbleiterbauelement Optoelectronic semiconductor component
06/26/2008DE102006059534A1 Halbleiterbauelement Semiconductor device
06/26/2008DE102006059526A1 Semiconductor component for utilities, has substrate, which has upper side and lower side, and semiconductor chip that is mounted on substrate, with front side and back side
06/26/2008DE102006059411A1 Method for producing optical sensor for mounting on carrier substrate, involves providing optical transparent plate with lateral dimensions larger than sensor chip
06/26/2008DE102006058695A1 Power semiconductor module, has housing, substrate with power semiconductor device, and metallic conductor, which has recess with base area, where lateral dimension is larger in both orthogonal directions in every case