Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
07/2008
07/16/2008CN100402963C Heat dissipation fins, heat pipe, master board metal integral radiator
07/16/2008CN100402575C Epoxy resin composition and semiconductor device
07/16/2008CN100402204C Electrochemical displacement-deposition method for making composite metal powders
07/16/2008CN100401953C Cooling/heating electronic sleeping bag based on semiconductor refrigerating and heat superconducting tech
07/15/2008US7400514 Non-rigid conductor link measurement sensor and method for the production thereof
07/15/2008US7400506 Method and apparatus for cooling a memory device
07/15/2008US7400504 Cooling apparatuses and methods employing discrete cold plates compliantly coupled between a common manifold and electronics components of an assembly to be cooled
07/15/2008US7400134 Integrated circuit device with multiple chips in one package
07/15/2008US7400049 Integrated circuit package system with heat sink
07/15/2008US7400047 Integrated circuit with stacked-die configuration utilizing substrate conduction
07/15/2008US7400046 Semiconductor device with guard rings that are formed in each of the plural wiring layers
07/15/2008US7400045 Semiconductor device and method for fabricating the same
07/15/2008US7400044 Semiconductor integrated circuit device
07/15/2008US7400043 Semiconductor constructions
07/15/2008US7400041 Compliant multi-composition interconnects
07/15/2008US7400040 Thermal interface apparatus, systems, and methods
07/15/2008US7400038 Semiconductor device, substrate, equipment board, method for producing semiconductor device, and semiconductor chip for communication
07/15/2008US7400037 Packaging structure with coplanar filling paste and dice and with patterned glue for WL-CSP
07/15/2008US7400036 Semiconductor chip package with a package substrate and a lid cover
07/15/2008US7400035 Semiconductor device having multilayer printed wiring board
07/15/2008US7400034 Semiconductor device
07/15/2008US7400033 Package on package design to improve functionality and efficiency
07/15/2008US7400032 Module assembly for stacked BGA packages
07/15/2008US7400031 Asymmetrically stressed CMOS FinFET
07/15/2008US7400028 Semiconductor device
07/15/2008US7400027 Nonvolatile memory device having two or more resistance elements and methods of forming and using the same
07/15/2008US7400025 Integrated circuit inductor with integrated vias
07/15/2008US7400014 ACCUFET with schottky source contact
07/15/2008US7400013 High-voltage transistor having a U-shaped gate and method for forming same
07/15/2008US7400008 Semiconductor device and manufacturing process therefor
07/15/2008US7400003 Structure of a CMOS image sensor and method for fabricating the same
07/15/2008US7400002 MOSFET package
07/15/2008US7399992 Device for defeating reverse engineering of integrated circuits by optical means
07/15/2008US7399990 Wafer-level package having test terminal
07/15/2008US7399919 Flexible heat sink
07/15/2008US7399706 Manufacturing method of semiconductor device
07/15/2008US7399700 Dual damascene interconnection with metal-insulator-metal capacitor and method of fabricating
07/15/2008US7399697 Producing high adhesion nanoporous layers with low capacitance loss; utilizing organosiloxane, carbon dioxide and organic nonsilicon compound having multiple unsaturated bonds and thermally labile group
07/15/2008US7399694 Semiconductor device and a manufacturing method of the same
07/15/2008US7399683 Manufacturing method of semiconductor device
07/15/2008US7399661 Method for making an integrated circuit substrate having embedded back-side access conductors and vias
07/15/2008US7399657 Ball grid array packages with thermally conductive containers
07/15/2008CA2578317C Mobile station supervision of the forward dedicated control channel when in the discontinuous transmission mode
07/10/2008WO2008083254A2 Ic package with integral vertical passive delay cells
07/10/2008WO2008083147A1 Stacked printed devices on a carrier substrate
07/10/2008WO2008083145A2 Control of standoff height between packages with a solder-embedded tape
07/10/2008WO2008083143A2 Semiconductor device assembly with chip-on-lead (col) and cantilever leads
07/10/2008WO2008083028A1 Physical alignment features on integrated circuit devices for accurate die-in-substrate embedding
07/10/2008WO2008082969A1 Thermally enhanced quad flat no leads (qfn) ic package and method
07/10/2008WO2008082942A2 High-z structure and method for co-alignment of mixed optical and electron beam lithographic fabrication levels
07/10/2008WO2008082847A2 Rotating contact element and methods of fabrication
07/10/2008WO2008082644A1 Semiconductor device and method of manufacturing the same
07/10/2008WO2008082565A1 Microelectronic devices and methods of manufacturing such devices
07/10/2008WO2008082150A2 Test socket for semiconductor
07/10/2008WO2008082004A1 Plating member and process for producing the plating member
07/10/2008WO2008081848A1 Cooling device, external kit for cooling electronic heat producing body, and electronic heat producing body assembly with cooling device
07/10/2008WO2008081847A1 A method of producing solid-state imaging device
07/10/2008WO2008081836A1 Resin composition for sealing light-emitting device, and lamp
07/10/2008WO2008081824A1 Semiconductor device and method for manufacturing the same
07/10/2008WO2008081806A1 Method for forming wiring film, transistor, and electronic device
07/10/2008WO2008081805A1 Method for forming wiring film, transistor, and electronic device
07/10/2008WO2008081758A1 Process for producing metallized aluminum nitride substrate
07/10/2008WO2008080991A1 Method for determining the cooling efficiency and method for determining a heat sink surface
07/10/2008WO2008080467A1 Connection wire, method for producing such a wire, and structural component
07/10/2008WO2008080274A1 Packaging structure of pcb and element module and packaging method of the same
07/10/2008WO2008080213A1 High speed otp sensing scheme
07/10/2008WO2008057739A3 Multi-component package with both top and bottom side connection pads for three-dimensional packaging
07/10/2008WO2008057257A3 One-time-programmable logic bit with multiple logic elements
07/10/2008WO2008055708A3 Microelectronic subassembly, and method for the production thereof
07/10/2008WO2008048666A3 Microelectronic packages and methods therefor
07/10/2008WO2008043010A3 Gold-tin solder joints having reduced embrittlement
07/10/2008WO2008021575A3 Microelectronic package
07/10/2008WO2007141664A8 Apparatus, system and method for use in mounting electronic elements
07/10/2008WO2007131095A3 Thermal management device for a memory module
07/10/2008WO2007084982A8 Dual-damascene process to fabricate thick wire structure
07/10/2008US20080167543 Analyte Monitoring Device And Methods Of Use
07/10/2008US20080166892 Mask for forming polysilicon and a method for fabricating thin film transistor using the same
07/10/2008US20080166870 Fabrication of Interconnect Structures
07/10/2008US20080166851 Metal-insulator-metal (mim) capacitor and method for fabricating the same
07/10/2008US20080166836 Semiconductor package including connected upper and lower interconnections, and manufacturing method thereof
07/10/2008US20080165518 Flip Clip Mounting Process And Bump-Forming Process Using Electrically-Conductive Particles
07/10/2008US20080164947 Semiconductor device
07/10/2008US20080164623 Wafer, semiconductor device, and fabrication methods therefor
07/10/2008US20080164622 Wiring board
07/10/2008US20080164621 Electric power semiconductor device
07/10/2008US20080164620 Multi-chip package and method of fabricating the same
07/10/2008US20080164619 Semiconductor chip package and method of manufacturing the same
07/10/2008US20080164618 Semiconductor package system with die carrier having mold flow restricting elements
07/10/2008US20080164617 Method of Forming Vertical Contacts in Integrated Circuits
07/10/2008US20080164616 Strip Conductor Structure for Minimizing Thermomechanical Loads
07/10/2008US20080164615 Connection between an I/O region and the core region of an integrated circuit
07/10/2008US20080164614 Semiconductor device
07/10/2008US20080164613 ULTRA-THIN Cu ALLOY SEED FOR INTERCONNECT APPLICATION
07/10/2008US20080164612 The back, inactive side of a semiconductor wafer is coated with a mixture of conductive filler such as silver that has an average particle size of less than 2 microns and a maximum particle size of less than 5 microns, solvent, and a soluble resin that has a softening point of 80-260 degrees C.
07/10/2008US20080164610 Substrate improving immobilization of ball pads for BGA packages
07/10/2008US20080164609 Injection molded solder ball method
07/10/2008US20080164608 Semiconductor device and method for producing the same
07/10/2008US20080164607 Electric power converter and mounting structure of semiconductor device
07/10/2008US20080164606 Spacers for wafer bonding
07/10/2008US20080164605 Multi-chip package
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