Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
07/2008
07/29/2008US7405446 Electrostatic protection systems and methods
07/29/2008US7405445 Semiconductor structure and method for ESD protection
07/29/2008US7405438 Capacitor constructions and semiconductor structures
07/29/2008US7405435 Semiconductor device having electrostatic destruction protection circuit using thyristor as protection element
07/29/2008US7405425 Thin film transistor, method of manufacturing the same, display apparatus having the same and method of manufacturing the display apparatus
07/29/2008US7405423 Random number generating device
07/29/2008US7405419 Unidirectionally conductive materials for interconnection
07/29/2008US7405364 Decoupled signal-power substrate architecture
07/29/2008US7405362 Semiconductor devices having more than two-rows of pad structures and methods of fabricating the same
07/29/2008US7405247 Metal filler particles dispersed in solvent-free hybrid epoxy polymer matrix; electronics; semiconductors; heat sinks
07/29/2008US7405159 Method of fabricating a semiconductor device package having a semiconductor element with a roughened surface
07/29/2008US7405155 Circuit package and method of plating the same
07/29/2008US7405150 Post passivation interconnection schemes on top of the IC chips
07/29/2008US7405149 Post passivation method for semiconductor chip or wafer
07/29/2008US7405148 Semiconductor device having a low-resistance bus interconnect, method of manufacturing same, and display apparatus employing same
07/29/2008US7405147 Device and methodology for reducing effective dielectric constant in semiconductor devices
07/29/2008US7405145 Ball grid array package substrates with a modified central opening and method for making the same
07/29/2008US7405143 Method for fabricating a seed layer
07/29/2008US7405138 Manufacturing method of stack-type semiconductor device
07/29/2008US7405109 Method of fabricating the routing of electrical signals
07/29/2008US7405104 Lead frame and method of producing the same, and resin-encapsulated semiconductor device and method of producing the same
07/29/2008US7405103 Process for fabricating chip embedded package structure
07/29/2008US7405085 Amorphous soft magnetic shielding and keeper for MRAM devices
07/29/2008US7404863 Methods of thinning a silicon wafer using HF and ozone
07/29/2008US7404511 Laser trimming problem suppressing semiconductor device manufacturing apparatus and method
07/24/2008WO2008089474A2 Apparatus and method for reduced delamination of an integrated circuit module
07/24/2008WO2008088955A1 Plastic semiconductor packages having improved metal land-locking features
07/24/2008WO2008088479A1 Microelectronic die including solder caps on bumping sites thereof and method of making same
07/24/2008WO2008088291A1 Method of semiconductor packaging and/or a semiconductor package
07/24/2008WO2008088012A1 Surface mounting crystal oscillator
07/24/2008WO2008087851A1 Flexible substrate and semiconductor device
07/24/2008WO2008087740A1 Semiconductor device
07/24/2008WO2008087701A1 Three-dimensional semiconductor integrated circuit device and method for manufacturing the same
07/24/2008WO2008087578A2 A system-in-package with through substrate via holes
07/24/2008WO2008087530A1 Underfill anchor structure for an integrated circuit
07/24/2008WO2008087475A1 Method of manufacturing of electronics package
07/24/2008WO2008087373A2 Structures with improved properties
07/24/2008WO2008067293A3 Abrasive powder coatings and methods for inhibiting tin whisker growth
07/24/2008WO2008060816A3 Stackable micropackages and stacked modules
07/24/2008WO2008043264A8 Light-emitting component package, light-emitting component packaging apparatus, and light source device
07/24/2008WO2008041069A3 3d chip arrangement including memory manager
07/24/2008WO2008039842A3 Two-way heat extraction from packaged semiconductor chips
07/24/2008WO2008036208A3 Wafer level chip package and a method of fabricating thereof
07/24/2008WO2008027058A3 Electrostatic discharge protection using conductive nanoparticles
07/24/2008WO2008003038A3 Systems and methods for improved cooling of lelectrical components
07/24/2008WO2007140049A3 Contact surrounded by passivation and polymide and method therefor
07/24/2008WO2007132683B1 Power semiconductor module
07/24/2008WO2007015965A3 Semiconductor die attachment for high vacuum tubes
07/24/2008WO2006138426A3 Electronic chip contact structure
07/24/2008US20080178028 Controlling power change for a semiconductor module
07/24/2008US20080176732 Higher melting substrate is an oxide or nitride of aluminum, titanium or zirconium; layer is silica powder, glass powder, glaze powder, copper oxide, lead oxide, hafnium oxide, or boron oxide and has embedded nanostructure stalagmites or columns extending towards the substrate; no polishing required
07/24/2008US20080176395 Copper interconnect systems
07/24/2008US20080176095 thermal interface; pulse-plated thermally conductive metal and a material that dissipates heat; dies, electronics
07/24/2008US20080174976 Electronic Circuit Component
07/24/2008US20080174975 Flexible wiring substrate and method for producing the same
07/24/2008US20080174535 Driver chip and display apparatus having the same
07/24/2008US20080174330 Rotational positioner and methods for semiconductor wafer test systems
07/24/2008US20080174240 Active matrix electroluminescence device having a metallic protective layer and method for fabricating the same
07/24/2008US20080174031 Chip package reducing wiring layers on substrate and its carrier
07/24/2008US20080174030 Multichip stacking structure
07/24/2008US20080174029 semiconductor device and method of forming metal pad of semiconductor device
07/24/2008US20080174027 Semiconductor interconnect structure with rounded edges and method for forming the same
07/24/2008US20080174026 Semiconductor device
07/24/2008US20080174025 Semiconductor chip structure, method of manufacturing the semiconductor chip structure, semiconductor chip package, and method of manufacturing the semiconductor chip package
07/24/2008US20080174024 Method for realizing an electric linkage in a semiconductor electronic device between a nanometric circuit architecture and standard electronic components
07/24/2008US20080174023 Chip having side pad, method of fabricating the same and package using the same
07/24/2008US20080174022 Semiconductor device and fabrication method thereof
07/24/2008US20080174021 Semiconductor devices having metal interconnections, semiconductor cluster tools used in fabrication thereof and methods of fabricating the same
07/24/2008US20080174020 Electronic device having metal pad structure and method of fabricating the same
07/24/2008US20080174019 Semiconductor device and method for manufacturing the same
07/24/2008US20080174018 Semiconductor device and method for fabricating the same
07/24/2008US20080174017 Hybrid interconnect structure for performance improvement and reliability enhancement
07/24/2008US20080174016 Flexible Printed Wiring Board and Semiconductor Device
07/24/2008US20080174015 Removal of etching process residual in semiconductor fabrication
07/24/2008US20080174014 Semiconductor device
07/24/2008US20080174013 Semiconductor device package and manufacturing method thereof
07/24/2008US20080174012 Semiconductor device manufacturing method, semiconductor device, and wiring board
07/24/2008US20080174011 Semiconductor structure and method for forming the same
07/24/2008US20080174010 Mems element fabrication method and mems element
07/24/2008US20080174009 Circuit board structure and fabrication method thereof
07/24/2008US20080174007 Heat sink with preattached thermal interface material and method of making same
07/24/2008US20080174006 Semiconductor device and method of manufacturing the same
07/24/2008US20080174005 Electronic device and method for manufacturing electronic device
07/24/2008US20080174004 Semiconductor device using wiring substrate having a wiring structure reducing wiring disconnection
07/24/2008US20080174003 Apparatus and method for reduced delamination of an integrated circuit module
07/24/2008US20080174002 Stress relieving layer for flip chip packaging
07/24/2008US20080174001 Semiconductor device
07/24/2008US20080174000 Zigzag-stacked package structure
07/24/2008US20080173999 Stack package and method of manufacturing the same
07/24/2008US20080173998 Chip arrangement and method for producing a chip arrangement
07/24/2008US20080173997 Electronic device and method of manufacturing the same
07/24/2008US20080173996 Semiconductor card package and method of forming the same
07/24/2008US20080173995 Memory card and manufacturing method of the same
07/24/2008US20080173993 Chip carrier substrate capacitor and method for fabrication thereof
07/24/2008US20080173992 Semiconductor device including isolation layer
07/24/2008US20080173991 Pre-molded clip structure
07/24/2008US20080173990 Thermally enhanced single inline package (SIP)
07/24/2008US20080173989 Leadframe designs for plastic overmold packages
07/24/2008US20080173988 Gas phase precipitated polymers as highly insulating chip backside layer
07/24/2008US20080173987 Semiconductor device