Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155) |
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07/01/2014 | US8766423 Semiconductor device and stacked semiconductor device |
07/01/2014 | US8766422 Through hole via filling using electroless plating |
07/01/2014 | US8766421 Semiconductor power module and method of manufacturing the same |
07/01/2014 | US8766420 Semiconductor device |
07/01/2014 | US8766419 Power module having stacked flip-chip and method of fabricating the power module |
07/01/2014 | US8766418 Semiconductor device |
07/01/2014 | US8766417 Integrated circuit chip with reduced IR drop |
07/01/2014 | US8766416 Semiconductor package and fabrication method thereof |
07/01/2014 | US8766412 Semiconductor device, method of manufacturing the same, and silane coupling agent |
07/01/2014 | US8766411 Filler for filling a gap, method of preparing the same and method of manufacturing semiconductor capacitor using the same |
07/01/2014 | US8766410 Embedded DRAM integrated circuits with extremely thin silicon-on-insulator pass transistors |
07/01/2014 | US8766409 Method and structure for through-silicon via (TSV) with diffused isolation well |
07/01/2014 | US8766401 Method of manufacturing a semiconductor component and structure |
07/01/2014 | US8766400 Electronic device containing passive components and fabrication method thereof |
07/01/2014 | US8766365 Circuit-protection devices |
07/01/2014 | US8766332 Optimization of critical dimensions and pitch of patterned features in and above a substrate |
07/01/2014 | US8766325 Semiconductor device |
07/01/2014 | US8766323 Organic light emitting display apparatus and method of manufacturing the same |
07/01/2014 | US8766284 Stackable optoelectronics chip-to-chip interconnects and method of manufacturing |
07/01/2014 | US8766259 Test structure for detection of gap in conductive layer of multilayer gate stack |
07/01/2014 | US8766258 Authentication using graphene based devices as physical unclonable functions |
07/01/2014 | US8766257 Test pad structure for reuse of interconnect level masks |
07/01/2014 | US8766101 Wiring substrate, method for manufacturing wiring substrate, and semiconductor package including wiring substrate |
07/01/2014 | US8766100 Printed circuit board and semiconductor package using the same |
07/01/2014 | US8765602 Doping of copper wiring structures in back end of line processing |
07/01/2014 | US8765598 Conductive structures, systems and devices including conductive structures and related methods |
07/01/2014 | US8765580 Method for fabricating semiconductor devices |
07/01/2014 | US8765568 Method of fabricating thermally controlled refractory metal resistor |
07/01/2014 | US8765531 Method for manufacturing a metal pad structure of a die, a method for manufacturing a bond pad of a chip, a die arrangement and a chip arrangement |
07/01/2014 | US8765530 Methods of manufacture of top port surface mount silicon condenser microphone packages |
07/01/2014 | US8765529 Semiconductor device and method for manufacturing the same |
07/01/2014 | US8765511 Semiconductor device and method for manufacturing the same |
07/01/2014 | US8765503 Method for fabricating organic EL device |
07/01/2014 | US8765497 Packaging and function tests for package-on-package and system-in-package structures |
07/01/2014 | US8765264 Silicone laminated substrate, method of producing same, silicone resin composition for producing silicone laminated substrate, and LED device |
07/01/2014 | US8763241 Method of manufacturing printed wiring board |
06/26/2014 | WO2014100656A1 Hot-melt type curable silicone composition for compression molding or laminating |
06/26/2014 | WO2014100278A1 Landing structure for through-silicon via |
06/26/2014 | WO2014100200A1 Method and structures for heat dissipating interposers |
06/26/2014 | WO2014100197A1 Chip positioning in multi-chip package |
06/26/2014 | WO2014100090A1 Die-stacked device with partitioned multi-hop network |
06/26/2014 | WO2014099793A1 An apparatus for differential far-end crosstalk reduction |
06/26/2014 | WO2014099670A1 Method and apparatus for far end crosstalk reduction in single ended signaling |
06/26/2014 | WO2014099406A1 Back-to-back stacked integrated circuit assembly and method of making |
06/26/2014 | WO2014099123A1 Getter structure for wafer level vacuum packaged device |
06/26/2014 | WO2014098966A1 High density organic bridge device and method |
06/26/2014 | WO2014098851A1 Heat removal assembly |
06/26/2014 | WO2014098324A1 Semiconductor device package |
06/26/2014 | WO2014098214A1 Flow path member, and heat exchanger and semiconductor device using same |
06/26/2014 | WO2014098189A1 Organic-inorganic hybrid prepolymer, organic-inorganic hybrid material, and element sealing structure |
06/26/2014 | WO2014098004A1 Semiconductor device |
06/26/2014 | WO2014097880A1 Method for producing substrate for power modules |
06/26/2014 | WO2014097836A1 Chip component mounting structure, and module component |
06/26/2014 | WO2014097798A1 Semiconductor device |
06/26/2014 | WO2014097723A1 Physical quantity sensor |
06/26/2014 | WO2014097645A1 Electronic component package and method for producing same |
06/26/2014 | WO2014097644A1 Electronic component package and method for producing same |
06/26/2014 | WO2014097643A1 Electronic component package and method for manufacturing same |
06/26/2014 | WO2014097642A1 Electronic component package and method for manufacturing same |
06/26/2014 | WO2014097641A1 Electronic component package and method for producing same |
06/26/2014 | WO2014097561A1 Heat dissipating sheet, heat dissipating apparatus, and method for manufacturing heat dissipating apparatus |
06/26/2014 | WO2014097524A1 Semiconductor device |
06/26/2014 | WO2014095997A1 An electronic module for a system for neural applications |
06/26/2014 | WO2014095500A1 Method for producing an electronic assembly |
06/26/2014 | WO2014095313A1 Method for testing a sensor circuit |
06/26/2014 | WO2014095270A1 Method for producing a multilayer carrier body |
06/26/2014 | WO2014094754A1 Electronic module with a plastic-coated electronic circuit and method for the production thereof |
06/26/2014 | WO2014094730A1 Tool for producing a friction-welded connection between a wire and a substrate, having a pocket-shaped recess |
06/26/2014 | WO2014094629A1 Semiconductor package and method for fabricating base for semiconductor package |
06/26/2014 | WO2014094450A1 Transistor, heat dissipation structure of transistor, and production method for transistor |
06/26/2014 | WO2014094436A1 Gold/silicon eutectic chip soldering method and transistor |
06/26/2014 | WO2014094395A1 Heat control device for power equipment |
06/26/2014 | WO2014070091A3 Through substrate vias and device |
06/26/2014 | US20140179832 Epoxy resin composition for encapsulating a semiconductor device and semiconductor device encapsulated using the same |
06/26/2014 | US20140179827 Quaternary phosphonium salt, epoxy resin composition for encapsulating semiconductor device and including the quaternary phosphonium salt, and semiconductor device encapsulated with the epoxy resin composition |
06/26/2014 | US20140179098 Semiconductor device and method of manufacturing semiconductor device |
06/26/2014 | US20140179066 Packaging structure |
06/26/2014 | US20140179065 Method of manufacturing semiconductor device |
06/26/2014 | US20140179064 Method for fabricating a package-in-package for high heat dissipation |
06/26/2014 | US20140179063 Resin sealing type semiconductor device and method of manufacturing the same, and lead frame |
06/26/2014 | US20140179059 Package-level integrated circuit connection without top metal pads or bonding wire |
06/26/2014 | US20140177626 Die-stacked device with partitioned multi-hop network |
06/26/2014 | US20140177365 Semiconductor apparatus, test method using the same and muti chips system |
06/26/2014 | US20140177158 Thermal matched composite die |
06/26/2014 | US20140177149 Reduction of underfill filler settling in integrated circuit packages |
06/26/2014 | US20140175681 Absorbing excess under-fill flow with a solder trench |
06/26/2014 | US20140175680 Electrical characteristics of package substrates and semiconductor packages including the same |
06/26/2014 | US20140175679 Semiconductor devices, package substrates, semiconductor packages, package stack structures, and electronic systems having functionally asymmetric conductive elements |
06/26/2014 | US20140175678 Semiconductor Device and Method of Manufacturing the Same |
06/26/2014 | US20140175677 Dicing tape-integrated film for semiconductor back surface |
06/26/2014 | US20140175676 Method for Bonding of Group III-Nitride Device-on-Silicon and Devices Obtained Thereof |
06/26/2014 | US20140175672 Hybrid substrate with high density and low density substrate areas, and method of manufacturing the same |
06/26/2014 | US20140175671 Structure for microelectronic packaging with bond elements to encapsulation surface |
06/26/2014 | US20140175670 Stacked die package |
06/26/2014 | US20140175669 Method for forming a dual damascene structure of a semiconductor device, and a semiconductor device therewith |
06/26/2014 | US20140175668 Semiconductor integrated circuit |
06/26/2014 | US20140175666 Integrated circuit device with stitched interposer |
06/26/2014 | US20140175665 Chip package using interposer substrate with through-silicon vias |
06/26/2014 | US20140175664 Dielectric solder barrier for semiconductor devices |
06/26/2014 | US20140175663 Semiconductor device having conductive via and manuacturing process |