Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
04/2009
04/15/2009CN100479131C Method for manufacturing trajectory with enlarged capacitive coupling and corresponding trajectory
04/15/2009CN100479124C Semiconductor device
04/15/2009CN100479114C Method for forming copper wiring
04/15/2009CN100479094C Method of forming a low thermal resistance device and structure
04/14/2009US7518881 Interposer containing bypass capacitors for reducing voltage noise in an IC device
04/14/2009US7518875 Securing heat sinks to a device under test
04/14/2009US7518874 Heat sink assembly
04/14/2009US7518873 Heat spreader, semiconductor package module and memory module having the heat spreader
04/14/2009US7518867 Electronic device cooling device and electronic device cooling method
04/14/2009US7518842 Circuits and methods that attenuate coupled noise
04/14/2009US7518252 Thin-film semiconductor substrate, method of manufacturing thin-film semiconductor substrate, method of crystallization, apparatus for crystallization, thin-film semiconductor device, and method of manufacturing thin-film semiconductor device
04/14/2009US7518251 Stacked electronics for sensors
04/14/2009US7518250 Semiconductor device and a method for manufacturing of the same
04/14/2009US7518249 Electric component with a flip-chip construction
04/14/2009US7518248 Inductive filters and methods of fabrication therefor
04/14/2009US7518247 Semiconductor device and its manufacturing method
04/14/2009US7518246 Atomic layer deposition of CeO2/Al2O3 films as gate dielectrics
04/14/2009US7518245 Contact structure of a semiconductor device
04/14/2009US7518244 Reducing line to line capacitance using oriented dielectric films
04/14/2009US7518243 Semiconductor device with multilayer interconnection structure
04/14/2009US7518242 Semiconductor testing device
04/14/2009US7518241 Wafer structure with a multi-layer barrier in an UBM layer network device with power supply
04/14/2009US7518240 Deposition pattern for eliminating backside metal peeling during die separation in semiconductor device fabrication
04/14/2009US7518239 Semiconductor device with substrate having penetrating hole having a protrusion
04/14/2009US7518238 Mounting flexible circuits onto integrated circuit substrates
04/14/2009US7518237 Microfeature systems including adhered microfeature workpieces and support members
04/14/2009US7518236 Power circuit package and fabrication method
04/14/2009US7518235 Method and structure to provide balanced mechanical loading of devices in compressively loaded environments
04/14/2009US7518234 MEMS direct chip attach packaging methodologies and apparatuses for harsh environments
04/14/2009US7518233 Sealing structure for multi-chip module
04/14/2009US7518231 Differential chip performance within a multi-chip package
04/14/2009US7518230 Semiconductor chip and semiconductor device
04/14/2009US7518229 Versatile Si-based packaging with integrated passive components for mmWave applications
04/14/2009US7518228 Hybrid integrated circuit device, and method for fabricating the same, and electronic device
04/14/2009US7518227 Multiple die stack apparatus employing T-shaped interposer elements
04/14/2009US7518226 Integrated circuit packaging system with interposer
04/14/2009US7518225 Chip system architecture for performance enhancement, power reduction and cost reduction
04/14/2009US7518224 Offset integrated circuit package-on-package stacking system
04/14/2009US7518223 Semiconductor devices and semiconductor device assemblies including a nonconfluent spacer layer
04/14/2009US7518222 Apparatus and system for an IC substrate, socket, and assembly
04/14/2009US7518221 Apparatus and methods for packaging integrated circuit chips with antennas formed from package lead wires
04/14/2009US7518220 Substrate for an FBGA semiconductor component
04/14/2009US7518219 Integrated heat spreader lid
04/14/2009US7518218 Total ionizing dose suppression transistor architecture
04/14/2009US7518217 Semiconductor device, semiconductor wafer, chip size package, and methods of manufacturing and inspection therefor
04/14/2009US7518209 Isolation of a high-voltage diode between a high-voltage region and a low-voltage region of an integrated circuit
04/14/2009US7518205 Semiconductor package and method for manufacturing the same
04/14/2009US7518200 Semiconductor integrated circuit chip with a nano-structure-surface passivation film
04/14/2009US7518193 SRAM array and analog FET with dual-strain layers comprising relaxed regions
04/14/2009US7518192 Asymmetrical layout structure for ESD protection
04/14/2009US7518190 Grounding front-end-of-line structures on a SOI substrate
04/14/2009US7518164 Current-triggered low turn-on voltage SCR
04/14/2009US7518157 Optoelectronic component assembly
04/14/2009US7518156 Semiconductor device
04/14/2009US7517797 Carrier for wafer-scale package, wafer-scale package including the carrier, and methods
04/14/2009US7517792 Semiconductor device having a multilayer interconnection structure, fabrication method thereof, and designing method thereof
04/14/2009US7517790 Method and structure to enhance temperature/humidity/bias performance of semiconductor devices by surface modification
04/14/2009US7517788 System, apparatus, and method for advanced solder bumping
04/14/2009US7517787 C4 joint reliability
04/14/2009US7517783 Molybdenum-doped indium oxide structures and methods
04/14/2009US7517778 Structure of high performance combo chip and processing method
04/14/2009US7517763 Semiconductor device having fuse and capacitor at the same level and method of fabricating the same
04/14/2009US7517762 Semiconductor device capable of preventing moisture-absorption of fuse area thereof and method for manufacturing the fuse area
04/14/2009US7517749 Method for forming an array with polysilicon local interconnects
04/14/2009US7517738 Method for producing a semiconductor integrated circuit including a thin film transistor and a capacitor
04/14/2009US7517734 Method of manufacturing a wafer level package with a cap structure for hermetically sealing a micro device
04/14/2009US7517722 Method of producing a universal semiconductor housing with precrosslinked plastic embedding compounds
04/14/2009US7517712 Wafer-level hermetic micro-device packages
04/14/2009US7517620 Method for fabricating array substrate having color filter on thin film transistor structure for liquid crystal display device
04/14/2009US7517606 Fuel cells and batteries including metal-carbon composite powders
04/14/2009US7517568 Packaging for dilute hypochlorite
04/14/2009US7517444 Plating method and apparatus for controlling deposition on predetermined portions of a workpiece
04/14/2009US7517225 Connector with wipe
04/14/2009US7516878 Bump formation method and bump forming apparatus for semiconductor wafer
04/09/2009WO2009046030A1 Stackable integrated circuit package
04/09/2009WO2009045803A1 Ball grid array assembly and solder pad
04/09/2009WO2009045763A1 Systems, methods and devices for arbitrating die stack position in a multi-die stack device
04/09/2009WO2009045716A1 Proximity communication package for processor, cache and memory
04/09/2009WO2009045711A1 Alignment features for proximity communication
04/09/2009WO2009045693A1 Multi-chip module and proximity communication between chips in the module
04/09/2009WO2009045626A1 Packaged integrated circuit devices with through- body conductive vias, and methods of making same
04/09/2009WO2009045362A1 Semiconductor structure comprising an electrically conductive feature and method of forming a semiconductor structure
04/09/2009WO2009045342A1 Semiconductor package having a bridged plate interconnection
04/09/2009WO2009045008A2 Circuit protection device
04/09/2009WO2009044987A1 Ultra wideband hermetically sealed surface mount technology for microwave monolithic integrated circuit package
04/09/2009WO2009044822A1 Copper alloy plate material for electric and electronic components
04/09/2009WO2009044737A1 Electronic component
04/09/2009WO2009044583A1 Active matrix substrate, method for manufacturing active matrix substrate, and liquid crystal display device
04/09/2009WO2009044529A1 Method for producing hydrophobilized porous film
04/09/2009WO2009043670A2 Electronic circuit composed of sub-circuits and method for producing the same
04/09/2009WO2009022252A3 Bond pad arrangement of an integrated circuit
04/09/2009WO2009018016A3 Solar heat management in photovoltaic systems using phase change materials
04/09/2009WO2009006284A3 Semiconductor die having a redistribution layer
04/09/2009WO2009001280A3 A method for the production of a microelectronic sensor device
04/09/2009WO2008045177A3 Electronic device and lead frame
04/09/2009WO2007145790A3 An integrated circuit device having barrier and method of fabricating the same
04/09/2009WO2007039892A3 Microelectronic intercionnect substrate and packaging techniques
04/09/2009WO2007009024A3 Folded frame carrier for mosfet bga
04/09/2009WO2006084177A3 Nested integrated circuit package on package system
04/09/2009WO2006050439A3 Multichip semiconductor package