Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
03/2009
03/26/2009WO2009037834A1 Primer resin for semiconductor device, and semiconductor device
03/26/2009WO2009037531A1 Improvements for reducing electromigration effect in an integrated circuit
03/26/2009WO2009037144A1 Method for operating an over-temperature protection control unit, and control unit
03/26/2009WO2009037119A1 Patternable dielectric film structure with improved lithography and method of fabricating same
03/26/2009WO2009037117A1 Interconnect structures with patternable low-k dielectrics and method of fabricating same
03/26/2009WO2009037037A1 Device for cooling electronic components
03/26/2009WO2009036969A1 Electronic system, and method for manufacturing a three-dimensional electronic system
03/26/2009WO2009021184A3 Methods and apparatus to support an overhanging region of a stacked die
03/26/2009WO2009013665A3 A leadframe structure for electronic packages
03/26/2009WO2009011752A3 Microelectronic package element and method of fabricating thereof
03/26/2009WO2009010353A3 Component comprising at least one semiconductor substrate having an integrated circuit
03/26/2009WO2009009516A3 Nano shower for chip-scale cooling
03/26/2009WO2008105938A3 Method of forming a micromechanical device with microfluidic lubricant channel
03/26/2009WO2007136932A3 Integrated circuit having pads and input/output (i/o) cells
03/26/2009WO2005091868A3 Wafer scale die handling
03/26/2009WO2005065238A3 Micro pin grid array with pin motion isolation
03/26/2009WO2005008724A3 Wafer-level chip scale package and method for fabricating and using the same
03/26/2009US20090081596 Metal photoetching product and production method thereof
03/26/2009US20090080279 Structure to share internally generated voltages between chips in mcp
03/26/2009US20090080129 Semiconductor chips having improved electrostatic discharge protection circuit arrangement
03/26/2009US20090079496 Multi-chip package for reducing parasitic load of pin
03/26/2009US20090079469 Semiconductor integrated circuit
03/26/2009US20090079459 Evaluation pattern suitable for evaluation of lateral hillock formation
03/26/2009US20090079449 Test Structures, Systems, and Methods for Semiconductor Devices
03/26/2009US20090079097 Electronic component with wire bonds in low modulus fill encapsulant
03/26/2009US20090079096 Integrated circuit package system with multiple device units
03/26/2009US20090079095 Semiconductor wafer, semiconductor chip cut from the semiconductor wafer, and method of manufacturing semiconductor wafer
03/26/2009US20090079094 Solder Bump with Inner Core Pillar in Semiconductor Package
03/26/2009US20090079093 Flip chip structure and method of manufacture
03/26/2009US20090079092 Stacked Dual-Die Packages, Methods of Making, and Systems Incorporating Said Packages
03/26/2009US20090079091 Integrated circuit packaging system with interposer
03/26/2009US20090079090 Stacked semiconductor chips
03/26/2009US20090079089 Stacked semiconductor chips
03/26/2009US20090079088 Semiconductor device with conductive die attach material
03/26/2009US20090079087 Semiconductor device and method for fabricating the same
03/26/2009US20090079086 Semiconductor Device
03/26/2009US20090079085 Semiconductor device
03/26/2009US20090079084 Preventing breakage of long metal signal conductors on semiconductor substrates
03/26/2009US20090079083 Interconnect structure and fabricating method of the same
03/26/2009US20090079082 Bonding pad structure allowing wire bonding over an active area in a semiconductor die and method of manufacturing same
03/26/2009US20090079081 Electronic device with wire bonds adhered between integrated circuits dies and printed circuit boards
03/26/2009US20090079080 Semiconductor Device with Multi-Layer Metallization
03/26/2009US20090079079 Semiconductor device with an air gap between lower interconnections and a connection portion to the lower interconnections not formed adjacent to the air gap
03/26/2009US20090079078 Minimization of Interfacial Resitance Across Thermoelectric Devices by Surface Modification of the Thermoelectric Material
03/26/2009US20090079077 Interconnect structure with a via gouging feature absent profile damage to the interconnect dielectric and method of fabricating same
03/26/2009US20090079076 Patternable dielectric film structure with improved lithography and method of fabricating same
03/26/2009US20090079075 Interconnect structures with patternable low-k dielectrics and method of fabricating same
03/26/2009US20090079074 Semiconductor device having decoupling capacitor formed on substrate where semiconductor chip is mounted
03/26/2009US20090079073 Semiconductor device having low dielectric insulating film and manufacturing method of the same
03/26/2009US20090079072 Semiconductor device having low dielectric insulating film and manufacturing method of the same
03/26/2009US20090079071 Stress relief structures for silicon interposers
03/26/2009US20090079070 Semiconductor Package with Passivation Island for Reducing Stress on Solder Bumps
03/26/2009US20090079069 Semiconductor Device and Method of Forming Interconnect Structure in Non-Active Area of Wafer
03/26/2009US20090079068 Methods for attaching a flip chip integrated circuit assembly to a substrate
03/26/2009US20090079067 Method for Stacking Semiconductor Chips
03/26/2009US20090079065 Semiconductor device including electronic component coupled to a backside of a chip
03/26/2009US20090079064 Methods of forming a thin tim coreless high density bump-less package and structures formed thereby
03/26/2009US20090079063 Microelectronic package and method of cooling an interconnect feature in same
03/26/2009US20090079062 Semiconductor package and electronic device
03/26/2009US20090079061 Thermally enhanced electronic flip-chip packaging with external-connector-side die and method
03/26/2009US20090079060 Method and structure for dispensing chip underfill through an opening in the chip
03/26/2009US20090079059 Integrated semiconductor substrate structure using incompatible processes
03/26/2009US20090079058 Semiconductor substrate elastomeric stack
03/26/2009US20090079057 Integrated circuit device
03/26/2009US20090079056 Large substrate structural vias
03/26/2009US20090079055 Method and structure of expanding, upgrading, or fixing multi-chip package
03/26/2009US20090079054 Semiconductor device, structure of mounting the same, and method of removing foreign matter from the same
03/26/2009US20090079053 Tape substrate and semiconductor module for smart card, method of fabricating the same, and smart card
03/26/2009US20090079052 Semiconductor package, apparatus and method for manufacturing the semiconductor package, and electronic device equipped with the semiconductor package
03/26/2009US20090079051 Semiconductor device and manufacturing method of the same
03/26/2009US20090079050 Air cavity package for flip-chip
03/26/2009US20090079049 Integrated circuit package system with warp-free chip
03/26/2009US20090079048 Integrated circuit package system with under paddle leadfingers
03/26/2009US20090079047 Cof package and tape substrate used in same
03/26/2009US20090079046 Semiconductor package and method for manufacturing the same
03/26/2009US20090079045 Package structure and manufacturing method thereof
03/26/2009US20090079044 Semiconductor package and manufacturing method thereof
03/26/2009US20090079043 Semiconductor device and method of manufacturing the same
03/26/2009US20090079042 Center Conductor to Integrated Circuit for High Frequency Applications
03/26/2009US20090079041 Semiconductor Package and Method of Reducing Electromagnetic Interference Between Devices
03/26/2009US20090079040 Semiconductor structure with coincident lattice interlayer
03/26/2009US20090079039 Semiconductor device, method for manufacturing semiconductor device, and method for designing manufacturing semiconductor device
03/26/2009US20090079038 Method Of Making An Integrated Circuit Including Singulating A Semiconductor Wafer
03/26/2009US20090079028 Semiconductor device having fuse with protection capacitor
03/26/2009US20090079027 Shallow trench isolation structure compatible with soi embedded dram
03/26/2009US20090079021 Low ohmic through substrate interconnection for semiconductor carriers
03/26/2009US20090079017 Semiconductor device having multiple substrates
03/26/2009US20090079016 Method for forming a dielectric stack
03/26/2009US20090079002 Superjunction Structures for Power Devices and Methods of Manufacture
03/26/2009US20090079001 Multi-channel esd device and method therefor
03/26/2009US20090078998 Semiconductor device having decreased contact resistance
03/26/2009US20090078968 Integrated circuit device and method for forming the same
03/26/2009US20090078966 Field-effect transistor, semiconductor chip and semiconductor device
03/26/2009US20090078935 Semiconductor device
03/26/2009US20090078460 Casing and mounting device
03/26/2009US20090078449 Dielectric sheet
03/26/2009US20090077796 Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board
03/26/2009DE10331801B4 Schaltung zum kontinuierlichen Überwachen und Einstellen eines analogen Signals sowie Verfahren zum Betreiben einer Schaltung Circuitry for continuously monitoring and adjusting an analog signal as well as methods for operating a circuit
03/26/2009DE10244791B4 Vorrichtung zur Kühlung von elektronischen Bauelementen A device for cooling of electronic components
03/26/2009DE102007044453A1 Elektrisches Vielschichtbauelement Electrical multilayer component
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