Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155) |
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06/11/2009 | US20090146305 Post passivation interconnection schemes on top of the ic chips |
06/11/2009 | US20090146304 Carbon nanotube integrated circuit devices and methods of fabrication therefor using protected catalyst layers |
06/11/2009 | US20090146303 Flip Chip Interconnection with double post |
06/11/2009 | US20090146302 Method for manufacturing semiconductor device |
06/11/2009 | US20090146301 Semiconductor device and method of manufacturing the same |
06/11/2009 | US20090146300 Semiconductor packages and electronic products employing the same |
06/11/2009 | US20090146299 Semiconductor package and method thereof |
06/11/2009 | US20090146298 Semiconductor device having solder-free gold bump contacts for stability in repeated temperature cycles |
06/11/2009 | US20090146297 Semiconductor Device and Method of Forming Wafer Level Ground Plane and Power Ring |
06/11/2009 | US20090146296 Method of forming high-k dielectric stop layer for contact hole opening |
06/11/2009 | US20090146295 Ceramic substrate having thermal via |
06/11/2009 | US20090146294 Gasket system for liquid-metal thermal interface |
06/11/2009 | US20090146293 Flow distribution module and a stack of flow distribution modules |
06/11/2009 | US20090146292 Semiconductor device thermal connection |
06/11/2009 | US20090146291 Semiconductor packages |
06/11/2009 | US20090146290 Interconnect Structure and Method for Semiconductor Device |
06/11/2009 | US20090146289 Thermoset polyimides for microelectronic applications |
06/11/2009 | US20090146288 Semiconductor device and method of manufacturing the same |
06/11/2009 | US20090146287 Semiconductor device having a chip-size package |
06/11/2009 | US20090146286 Direct attach interconnect for connecting package and printed circuit board |
06/11/2009 | US20090146285 Fabrication method of semiconductor package |
06/11/2009 | US20090146284 Molded Leadless Packages and Assemblies Having Stacked Molded Leadless Packages |
06/11/2009 | US20090146283 Stacked-type chip package structure and fabrication method thereof |
06/11/2009 | US20090146282 Semiconductor Package and Method of Forming Similar Structure for Top and Bottom Bonding Pads |
06/11/2009 | US20090146281 System in package and fabrication method thereof |
06/11/2009 | US20090146280 Circuit member, manufacturing method of the circuit member, and semiconductor device including the circuit member |
06/11/2009 | US20090146279 Method for attaching a semiconductor die to a leadframe, and a semiconductor device |
06/11/2009 | US20090146278 Chip-stacked package structure with asymmetrical leadframe |
06/11/2009 | US20090146277 Semiconductor device |
06/11/2009 | US20090146276 Flip-chip leadframe semiconductor package |
06/11/2009 | US20090146275 Lead frame and semiconductor device provided with lead frame |
06/11/2009 | US20090146274 Integrated circuit packages includng sinuous lead frames |
06/11/2009 | US20090146273 Semiconductor device |
06/11/2009 | US20090146272 Electronic device |
06/11/2009 | US20090146271 Integrated circuit package-in-package system |
06/11/2009 | US20090146270 Embedded Package Security Tamper Mesh |
06/11/2009 | US20090146269 Integrated circuit package system with shield |
06/11/2009 | US20090146268 Integrated circuit package system for electromagnetic isolation |
06/11/2009 | US20090146267 Secure connector grid array package |
06/11/2009 | US20090146265 ULTRA LOW k PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION PROCESSES USING A SINGLE BIFUNCTIONAL PRECURSOR CONTAINING BOTH A SiCOH MATRIX FUNCTIONALITY AND ORGANIC POROGEN FUNCTIONALITY |
06/11/2009 | US20090146261 Semiconductor device and fabrication method of the semiconductor device |
06/11/2009 | US20090146260 Semiconductor wafer including cracking stopper structure and method of forming the same |
06/11/2009 | US20090146259 Sub-Resolution Assist Feature To Improve Symmetry for Contact Hole Lithography |
06/11/2009 | US20090146251 Semiconductor device |
06/11/2009 | US20090146250 Semiconductor device |
06/11/2009 | US20090146249 Semiconductor structure and method of manufacture |
06/11/2009 | US20090146245 Semiconductor structure and method of manufacture |
06/11/2009 | US20090146239 Photodiode |
06/11/2009 | US20090146193 Conductive Interconnects |
06/11/2009 | US20090146174 Semiconductor device and manufacturing method thereof, and camera module including the same |
06/11/2009 | US20090146145 Processing condition inspection and optimization method of damage recovery process, damage recovering system and storage medium |
06/11/2009 | US20090146144 Method and system supporting production of a semiconductor device using a plurality of fabrication processes |
06/11/2009 | US20090146143 Test structure for determining optimal seed and liner layer thicknesses for dual damascene processing |
06/11/2009 | US20090146129 Multi-bit memory cell structure and method of manufacturing the same |
06/11/2009 | US20090145656 Electrical device |
06/10/2009 | EP2068362A1 Semiconductor power module with flexible circuit leadframe |
06/10/2009 | EP2068361A1 Packaging substrate having chip embedded therein and manufacturing method thereof |
06/10/2009 | EP2068360A2 Improved methods of mid-frequency decoupling and device providing an improved mid-frequency decoupling |
06/10/2009 | EP2068359A1 Cooling apparatus |
06/10/2009 | EP2067879A1 Plated material having metal thin film formed by electroless plating, and method for production thereof |
06/10/2009 | EP2067878A1 Plated material having metal thin film formed by electroless plating, and method for production thereof |
06/10/2009 | EP2067391A1 Substrate-penetrating electrical connections |
06/10/2009 | EP2067169A1 Shielding floating gate tunneling element structure |
06/10/2009 | EP2067167A1 Electronic device and method for making the same |
06/10/2009 | EP1529310A4 Porous low-k dielectric interconnect structures |
06/10/2009 | EP1025584B1 Integrated electronic circuit comprising at least an electronic power component |
06/10/2009 | DE202009003412U1 Für Ballrastermatrix-Oberflächen spezifischer Fügungsaufbau For ball grid array surfaces addition of specific structure |
06/10/2009 | DE19926756B4 Elektronische Schaltkreisvorrichtung und Verfahren zum Herstellen derselben Electronic circuit device and method of manufacturing the same |
06/10/2009 | DE10361714B4 Halbleiterbauelement Semiconductor device |
06/10/2009 | DE10343257B4 Verfahren zur Herstellung von Zwischenverbindungen bei Chip-Sandwich-Anordnungen Process for the preparation of intermediate compounds in chip-sandwich assemblies |
06/10/2009 | DE10340603B4 Schaltungsanordnung und Spannungsregeleinrichtung mit Schaltungsanordnung Circuitry and voltage regulating device with circuitry |
06/10/2009 | DE10301655B4 Steuerschaltung für eine Leistungshalbleitervorrichtung Control circuit for a power semiconductor device |
06/10/2009 | DE10205563B4 Gehäustes Halbleiterbauelement mit zwei Die-Paddles sowie zugehöriges Herstellungsverfahren A housed semiconductor component with two paddles and the manufacturing method thereof |
06/10/2009 | DE10203198B4 Verfahren zur Materialbearbeitung mit Laserimpulsen großer spektraler Bandbreite und Vorrichtung zur Durchführung des Verfahrens Method for machining material with laser pulses large spectral bandwidth and device for carrying out the method |
06/10/2009 | DE102008060300A1 Halbleitervorrichtung Semiconductor device |
06/10/2009 | DE102008058834A1 Elektronische Anordnung und Verfahren zur Herstellung derselben An electronic device and method of manufacturing the same |
06/10/2009 | DE102008056145A1 Semiconductor element e.g. power transistor or thyristor, protecting device for use in vehicle, has integrated, pyrotechnical load for interrupting current flow to semiconductor element, during occurrence of stress peak and over-current |
06/10/2009 | DE102007058951A1 MEMS Package MEMS package |
06/10/2009 | DE102007058649A1 Information reading-out device for wafer, has radiation source i.e. LED, for irradiating semiconductor substrate with electromagnetic radiation, where radiation source and sensor are arranged in relation to sides of substrate |
06/10/2009 | DE102007058184A1 Electrostatic discharge-characteristic checking method for high-voltage low side driver in vehicle area, involves determining parameter value characterizing discharge resistance between connection points, for signal path |
06/10/2009 | DE102007057533A1 Kühlkörper und Verfahren zur Herstellung eines Kühlkörpers Heat sink and method for manufacturing a heat sink |
06/10/2009 | DE102007057346B3 Laminierte Leistungselektronikbaugruppe Laminated power electronics module |
06/10/2009 | DE102007057223A1 Herstellungsverfahren zum Ausbilden einer integrierten Schaltungsvorrichtung und entsprechende integrierte Schaltungsvorrichtung Preparation method of forming an integrated circuit device and corresponding integrated circuit device |
06/10/2009 | DE102007056581A1 Electrical load i.e. motor vehicle blower motor, controlling device, has connection elements brought out from housing, and chip and resistance element, which are electrically connected by connection elements |
06/10/2009 | DE102007021986B4 Halbleitereinrichtung mit integriertem metallischen Kühlkörper und Verfahren zu deren Herstellung A semiconductor device with integrated metallic heat sink and method for the preparation thereof |
06/10/2009 | DE102007007224B4 Leistungshalbleitermodul mit einem Gehäuse Power semiconductor module with a housing |
06/10/2009 | DE102007003587B4 Leistungshalbleitermodul mit Druckkörper Power semiconductor module with a pressure body |
06/10/2009 | DE102006058010B9 Halbleiterbauelement mit Hohlraumstruktur und Herstellungsverfahren A semiconductor device structure and manufacturing method with cavity |
06/10/2009 | DE102006006425B4 Leistungshalbleitermodul in Druckkontaktausführung Power semiconductor module in pressure contact design |
06/10/2009 | DE102006006423B4 Leistungshalbleitermodul und zugehöriges Herstellungsverfahren The power semiconductor module and associated production method |
06/10/2009 | DE102005007280B4 Verfahren zum Bestimmen einer kritischen Dimension einer lateral strukturierten Schicht A method for determining a critical dimension of a laterally structured layer |
06/10/2009 | DE102004039693B4 Vergussmasse, Chipmodul und Verfahren zur Herstellung eines Chipmoduls Potting compound chip module and method of producing a chip module |
06/10/2009 | DE102004002030B4 Verbundmaterial und Verfahren zu dessen Herstellung Composite material and process for its preparation |
06/10/2009 | DE10055177B4 Elektronisches Bauelement mit einem Halbleiter, insbesondere einem Leistungshalbleiter, mit Trennwänden zwischen den Anschlussstiften An electronic component with a semiconductor, in particular a power semiconductor, with partition walls between the pins |
06/10/2009 | CN201256149Y Component stack construction for integrated circuit |
06/10/2009 | CN201256148Y 芯片封装结构 Chip package structure |
06/10/2009 | CN201256147Y 芯片封装结构 Chip package structure |
06/10/2009 | CN201256146Y Integrated circuit package protection construction |
06/10/2009 | CN101454898A Method and system for composite bond wires |
06/10/2009 | CN101454897A Thermally conductive composite interface, cooled electronic assemblies employing the same, and methods of fabrication thereof |