Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
11/2009
11/24/2009US7622750 Optical device package and optical semiconductor device using the same
11/24/2009US7622737 Test structures for electrically detecting back end of the line failures and methods of making and using the same
11/24/2009US7622736 Semiconductor device and method for manufacturing the same
11/24/2009US7622733 Semiconductor structure with a plastic housing and separable carrier plate
11/24/2009US7622684 Electronic component package
11/24/2009US7622526 Thermoset material based on antiplasticizing polythiourethane and ophthalmic lens comprising an antiplasticized thermoset material
11/24/2009US7622515 Composition of epoxy resin, phenolic resin, silicone compound, spherical alumina and ultrafine silica
11/24/2009US7622332 Partially patterned lead frames and methods of making and using the same in semiconductor packaging
11/24/2009US7622331 Method for forming contacts of semiconductor device
11/24/2009US7622329 Method for fabricating core substrate using paste bumps
11/24/2009US7622326 Manufacturing process of a chip package structure
11/24/2009US7622324 Wafer bonding hermetic encapsulation
11/24/2009US7622203 Thermoconductivity for use as heater substrate; Aluminum nitride sintered body having a larger area and a smaller thickness than prior art; ; flatness with controlled warpage and/or waviness height
11/24/2009US7622199 An aluminoxane and UV curable acrylic monomer such as trimethylolpropane triacrylate; humidity resistance for thin profile OLEDs that ensures reliability and suitable for mass production
11/24/2009US7622184 Multilevel interconnection board and method of fabricating the same
11/24/2009US7621976 forming a photovoltaic conductive feature; in a flowing aerosol stream, preparing silver-containing particles, then coating with a material other than silver by vapor deposition; disperse silver particles confined in metal or ceramic coatings; uses in electronics and electrochemical cells
11/24/2009US7621316 Heat sink with heat pipes and method for manufacturing the same
11/19/2009WO2009140340A1 Process of fabricating microfluidic device chips and chips formed thereby
11/19/2009WO2009140244A2 Packaged electronic devices with face-up die having through substrate via connection to leads and die pad
11/19/2009WO2009140238A2 Structure and method for reliable solder joints
11/19/2009WO2009139962A2 Efficient interconnect structure for electrical fuse applications
11/19/2009WO2009139485A1 Film forming method of silicon oxide film, silicon oxide film, semiconductor device, and manufacturing method of semicomductor device
11/19/2009WO2009139472A1 Substrate for power module, power module, and method for producing substrate for power module
11/19/2009WO2009139425A1 Amorphous siliceous powder, process for production of the same, and use thereof
11/19/2009WO2009139372A1 Inductor element, integrated circuit device, and three-dimensionally packaged circuit device
11/19/2009WO2009139282A1 Semiconductor device and method for manufacturing semiconductor device
11/19/2009WO2009139272A1 Multilayer ceramic substrate and method for producing the same
11/19/2009WO2009139210A1 High frequency storing case and high frequency module
11/19/2009WO2009139153A1 Semiconductor component fabrication method and semiconductor component
11/19/2009WO2009138990A1 Encapsulation material
11/19/2009WO2009138560A1 Circuit module and method of manufacturing the same
11/19/2009WO2009138301A1 Electronic packaging
11/19/2009WO2009138048A1 Contact structure and method for producing a contact structure
11/19/2009WO2009137955A1 A curable composition and use thereof
11/19/2009WO2009137954A1 A curable composition and use thereof
11/19/2009WO2009117476A3 Method of fabricating a semiconductor package or circuit assembly using a fluxing underfill composition applied to solder contact points in a dip process
11/19/2009WO2009115673A3 Contactless object with integrated circuit connected to circuit terminals by capacitive coupling
11/19/2009WO2009080573A3 Monolithically integrated antenna- and receiver circuit for the detection of terahertz waves
11/19/2009WO2009024913A3 Identification of devices using physically unclonable functions
11/19/2009US20090286951 Low-corrosion epoxy resins and production methods therefor
11/19/2009US20090286356 Stacked mass storage flash memory package
11/19/2009US20090284304 Circuit for generating a temperature-compensated voltage reference, in particular for applications with supply voltages lower than 1v
11/19/2009US20090283922 Integrating high stress cap layer in high-k metal gate transistor
11/19/2009US20090283921 Contact layout structure
11/19/2009US20090283920 Ball-bump bonded ribbon-wire interconnect
11/19/2009US20090283919 Semiconductor package featuring flip-chip die sandwiched between metal layers
11/19/2009US20090283918 Semiconductor chip package structure
11/19/2009US20090283917 Systems and methods for vertical stacked semiconductor devices
11/19/2009US20090283916 Chip structure and method of reworking chip
11/19/2009US20090283915 Oversized Contacts and Vias in Layout Defined by Linearly Constrained Topology
11/19/2009US20090283914 Silicon interposer and method for manufacturing the same
11/19/2009US20090283913 Semiconductor device and method for fabricating semiconductor device
11/19/2009US20090283912 Damascene wiring fabrication methods incorporating dielectric cap etch process with hard mask retention
11/19/2009US20090283911 Backend Interconnect Scheme with Middle Dielectric Layer Having Improved Strength
11/19/2009US20090283910 Semiconductor device and fabrication method thereof
11/19/2009US20090283909 Semiconductor device and manufacturing method thereof
11/19/2009US20090283908 Metal line of semiconductor device and method for forming the same
11/19/2009US20090283907 Low-resistance interconnects and methods of making same
11/19/2009US20090283906 Semiconductor device, method for mounting semiconductor device, and mounting structure of semiconductor device
11/19/2009US20090283905 Conductive structure of a chip
11/19/2009US20090283904 Flipchip bump patterns for efficient i-mesh power distribution schemes
11/19/2009US20090283903 Bump with multiple vias for semiconductor package and fabrication method thereof, and semiconductor package utilizing the same
11/19/2009US20090283902 Semiconductor Package Structures Having Liquid Coolers Integrated with First Level Chip Package Modules
11/19/2009US20090283901 Semiconductor device and multilayer wiring board
11/19/2009US20090283900 Semiconductor device and manufacturing method for semiconductor device
11/19/2009US20090283899 Semiconductor Device
11/19/2009US20090283898 Disabling electrical connections using pass-through 3d interconnects and associated systems and methods
11/19/2009US20090283897 Semiconductor package, method for manufacturing a semiconductor package, an electronic device, method for manufacturing an electronic device
11/19/2009US20090283896 Package structure and method
11/19/2009US20090283895 Semiconductor device and method for manufacturing the same
11/19/2009US20090283894 Semiconductor chip package and printed circuit board having through interconnections
11/19/2009US20090283893 Integrated circuit package system with slotted die paddle and method of manufacture thereof
11/19/2009US20090283892 Design method of semiconductor package substrate
11/19/2009US20090283891 Elastically deformable integrated-circuit device
11/19/2009US20090283890 Semiconductor multi-package module including tape substrate land grid array package stacked over ball grid array package
11/19/2009US20090283889 Integrated circuit package system
11/19/2009US20090283888 Package system incorporating a flip-chip assembly
11/19/2009US20090283887 Optical semiconductor device
11/19/2009US20090283886 Ic card
11/19/2009US20090283885 Semiconductor Device and a Method of Manufacturing the Same
11/19/2009US20090283884 Lead frame, semiconductor package including the same, and method of manufacturing the lead frame and the semiconductor package
11/19/2009US20090283883 Semiconductor device using lead frame
11/19/2009US20090283882 Qfn semiconductor package and fabrication method thereof
11/19/2009US20090283881 Semiconductor chip package structure for achieving face-down electrical connection without using a wire-bonding process and method for making the same
11/19/2009US20090283880 Semiconductor Chip Package Assembly with Deflection- Resistant Leadfingers
11/19/2009US20090283879 Semiconductor device and method
11/19/2009US20090283878 Lead-on-chip semiconductor package and leadframe for the package
11/19/2009US20090283877 Semiconductor device and manufacturing method thereof
11/19/2009US20090283876 Electromagnetic interference shield for semiconductors using a continuous or near-continuous peripheral conducting seal and a conducting lid
11/19/2009US20090283874 Semiconductor device manufacturing method and semiconductor device
11/19/2009US20090283873 Method for forming self-alignment insulation structure
11/19/2009US20090283872 Package structure of three-dimensional stacking dice and method for manufacturing the same
11/19/2009US20090283871 System, Structure, and Method of Manufacturing a Semiconductor Substrate Stack
11/19/2009US20090283870 Semiconductor Device and Method of Conforming Conductive Vias Between Insulating Layers in Saw Streets
11/19/2009US20090283869 Scribe line structure for wafer dicing and method of making the same
11/19/2009US20090283867 Integration structure of semiconductor circuit and microprobe sensing elements and method for fabricating the same
11/19/2009US20090283847 Semiconductor package including through-hole electrode and light-transmitting substrate
11/19/2009US20090283845 Sensing apparatus with packaging material as sensing protection layer and method of manufacturing the same
11/19/2009US20090283844 Process of fabricating microfluidic device chips and chips formed thereby
11/19/2009US20090283833 Integrated circuits having a contact structure having an elongate structure and methods for manufacturing the same