Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
01/2010
01/05/2010US7642629 Methods and apparatus for packaging integrated circuit devices
01/05/2010US7642628 MEMS packaging with improved reaction to temperature changes
01/05/2010US7642627 Semiconductor device
01/05/2010US7642625 Method of evaluating thermal stress resistance of semiconductor device, and semiconductor wafer having test element
01/05/2010US7642624 Semiconductor device having a guard ring
01/05/2010US7642612 Semiconductor device and manufacturing method thereof
01/05/2010US7642611 Sensor device, sensor system and methods for manufacturing them
01/05/2010US7642605 Semiconductor device
01/05/2010US7642604 Semiconductor device and fabrication method of same
01/05/2010US7642601 Method of designing semiconductor integrated circuit device and semiconductor integrated circuit device
01/05/2010US7642600 System and method for providing a low voltage thin gate input/output structure with thick gate overvoltage/backdrive protection
01/05/2010US7642599 Semiconductor device and junction termination structure
01/05/2010US7642591 Multi-resistive integrated circuit memory
01/05/2010US7642566 Scalable process and structure of JFET for small and decreasing line widths
01/05/2010US7642551 Wafer-level package having test terminal
01/05/2010US7642550 Multi-layer structures for parameter measurement
01/05/2010US7642185 Insulating film forming method capable of enhancing adhesion of silicon carbide film, etc. and semiconductor device
01/05/2010US7642138 Split-channel antifuse array architecture
01/05/2010US7642133 Method of making a semiconductor package and method of making a semiconductor device
01/05/2010US7642131 Decoupling capacitor closely coupled with integrated circuit
01/05/2010US7642126 Method of manufacturing circuits
01/05/2010US7641709 Diamond particles dispersed in a copper matrix have a chemically bonded thin coating of silicon carbide; diffusion bonded and functionally graded interactive layer; thermal conductivity > 400 W/m.k.; substrates for electronic package containing abonded LDMOS chip; sheets; strength; stiffness
01/05/2010US7640660 Method for manufacturing multilayer wiring board incorporating carbon fibers and glass fibers
01/05/2010CA2360359C Non-contact or non-contact hybrid smart card for limiting risks of fraud
12/2009
12/31/2009US20090323168 Electromechanical devices and methods of fabricating same
12/31/2009US20090322852 Composite semiconductor device, print head and image forming apparatus
12/31/2009US20090322430 Semiconductor package with reduced inductive coupling between adjacent bondwire arrays
12/31/2009US20090322402 Semiconductor integrated circuit device
12/31/2009US20090321965 Electronic device having a wiring substrate
12/31/2009US20090321964 Stress Buffer Layer for Ferroelectric Random Access Memory
12/31/2009US20090321963 Injection molded metal stiffener for packaging applications
12/31/2009US20090321962 Microelectronic package with self-heating interconnect
12/31/2009US20090321961 Method of Packaging a Die
12/31/2009US20090321960 Semiconductor memory device
12/31/2009US20090321959 Chip Arrangement and Method of Manufacturing a Chip Arrangement
12/31/2009US20090321958 Semiconductor device having a simplified stack and method for manufacturing thereof
12/31/2009US20090321957 Layered chip package and method of manufacturing same
12/31/2009US20090321956 Layered chip package and method of manufacturing same
12/31/2009US20090321955 Securing integrated circuit dice to substrates
12/31/2009US20090321954 Stacked semiconductor package electrically connecting semiconductor chips using outer surfaces thereof and method for manufacturing the same
12/31/2009US20090321953 Circuit substrate having circuit wire formed of conductive polarization particles, method of manufacturing the circuit substrate and semiconductor package having the circuit wire
12/31/2009US20090321952 Wire on wire stitch bonding in a semiconductor device
12/31/2009US20090321951 Stacked wire bonded semiconductor package with low profile bond line
12/31/2009US20090321950 Stacked semiconductor package with localized cavities for wire bonding
12/31/2009US20090321949 Backside mold process for ultra thin substrate and package on package assembly
12/31/2009US20090321948 Method for stacking devices
12/31/2009US20090321947 Surface depressions for die-to-die interconnects and associated systems and methods
12/31/2009US20090321946 Process for fabricating an integrated electronic circuit incorporating a process requiring a voltage threshold between a metal layer and a substrate
12/31/2009US20090321945 Side wall pore sealing for low-k dielectrics
12/31/2009US20090321944 Semiconductor device with improved interconnection of conductor plug
12/31/2009US20090321942 Method of forming stacked trench contacts and structures formed thereby
12/31/2009US20090321941 Phase memorization for low leakage dielectric films
12/31/2009US20090321940 Method for Manufacturing Contact Openings, Method for Manufacturing an Integrated Circuit, an Integrated Circuit
12/31/2009US20090321939 Through Silicon via Bridge Interconnect
12/31/2009US20090321938 Methods of Manufacturing Copper Interconnect Systems
12/31/2009US20090321937 Semiconductor device and method of manufacturing same
12/31/2009US20090321936 Semiconductor device manufacturing method, semiconductor device manufacturing apparatus, semiconductor device, computer program and storage medium
12/31/2009US20090321935 Methods of forming improved electromigration resistant copper films and structures formed thereby
12/31/2009US20090321934 Self-aligned cap and barrier
12/31/2009US20090321933 Structure to Facilitate Plating Into High Aspect Ratio Vias
12/31/2009US20090321932 Coreless substrate package with symmetric external dielectric layers
12/31/2009US20090321931 Semiconductor device and method of manufacturing the same
12/31/2009US20090321930 Semiconductor with bottom-side wrap-around flange contact
12/31/2009US20090321929 Standing chip scale package
12/31/2009US20090321928 Flip chip assembly process for ultra thin substrate and package on package assembly
12/31/2009US20090321927 Semiconductor device and manufacturing method for the same
12/31/2009US20090321926 Mounting structure and mounting method
12/31/2009US20090321925 Injection molded metal ic package stiffener and package-to-package interconnect frame
12/31/2009US20090321924 Power Semiconductor Module
12/31/2009US20090321923 Magnetic particle-based composite materials for semiconductor packages
12/31/2009US20090321922 Self-healing thermal interface materials for semiconductor packages
12/31/2009US20090321920 Semiconductor device and method of manufacturing the same
12/31/2009US20090321919 Semiconductor device
12/31/2009US20090321918 Chip package
12/31/2009US20090321917 Electrical Component
12/31/2009US20090321916 Semiconductor structure, method for manufacturing semiconductor structure and semiconductor package
12/31/2009US20090321915 System-in-package and manufacturing method of the same
12/31/2009US20090321914 Production of integrated circuit chip packages prohibiting formation of micro solder balls
12/31/2009US20090321913 Integrated circuit package system with locking terminal
12/31/2009US20090321912 Semiconductor device and method of manufacturing the same
12/31/2009US20090321911 Semiconductor Package and Manufacturing Method Thereof
12/31/2009US20090321910 Semiconductor package, stacked semiconductor package having the same, and a method for selecting one semiconductor chip in a stacked semiconductor package
12/31/2009US20090321909 Active Thermal Control for Stacked IC Devices
12/31/2009US20090321908 Stacked integrated circuit package system with intra-stack encapsulation
12/31/2009US20090321907 Stacked integrated circuit package system
12/31/2009US20090321906 Semiconductor device with package to package connection
12/31/2009US20090321905 Multi-Package Ball Grid Array
12/31/2009US20090321904 Semiconductor device and semiconductor integrated circuit
12/31/2009US20090321903 Semiconductor device and manufacturing method thereof
12/31/2009US20090321902 Semiconductor device and manufacturing method thereof
12/31/2009US20090321901 Thermally balanced heat sinks
12/31/2009US20090321900 Semiconductor device
12/31/2009US20090321899 Integrated circuit package system stackable devices
12/31/2009US20090321898 Conformal shielding integrated circuit package system
12/31/2009US20090321897 Method and apparatus of power ring positioning to minimize crosstalk
12/31/2009US20090321896 Semiconductor device and its manufacturing method
12/31/2009US20090321892 Semiconductor package using through-electrodes having voids
12/31/2009US20090321891 Method and apparatus for generating reticle data
12/31/2009US20090321890 Protective Seal Ring for Preventing Die-Saw Induced Stress
12/31/2009US20090321889 Scribe Seal Connection