Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
08/2014
08/19/2014US8810046 Silicone resin composition, encapsulating layer, reflector, and optical semiconductor device
08/19/2014US8810045 Packaging substrate and semiconductor package
08/19/2014US8810044 Dicing tape-integrated wafer back surface protective film
08/19/2014US8810043 Semiconductor device
08/19/2014US8810042 Semiconductor device
08/19/2014US8810040 Wiring substrate including projecting part having electrode pad formed thereon
08/19/2014US8810039 Semiconductor device having a pad and plurality of interconnects
08/19/2014US8810038 Semiconductor device and wiring board
08/19/2014US8810037 Semiconductor device and method for manufacturing the same
08/19/2014US8810036 Semiconductor device and method forming patterns with spaced pads in trim region
08/19/2014US8810035 Semiconductor bonding structure body and manufacturing method of semiconductor bonding structure body
08/19/2014US8810034 Semiconductor device and manufacturing method thereof
08/19/2014US8810033 Barrier layer for integrated circuit contacts
08/19/2014US8810032 Semiconductor device and method for manufacturing of same
08/19/2014US8810031 Wafer-to-wafer stack with supporting pedestal
08/19/2014US8810030 MEMS device with stress isolation and method of fabrication
08/19/2014US8810029 Solder joint flip chip interconnection
08/19/2014US8810028 Integrated circuit packaging devices and methods
08/19/2014US8810027 Bond ring for a first and second substrate
08/19/2014US8810026 Semiconductor module
08/19/2014US8810025 Reinforcement structure for flip-chip packaging
08/19/2014US8810024 Semiconductor method and device of forming a fan-out PoP device with PWB vertical interconnect units
08/19/2014US8810022 Power and ground planes in package substrate
08/19/2014US8810021 Semiconductor device including a recess formed above a semiconductor chip
08/19/2014US8810019 Integrated circuit package system with stacked die
08/19/2014US8810018 Stacked integrated circuit package system with face to face stack configuration
08/19/2014US8810017 Integrated circuit package system with removable backing element having plated terminal leads and method of manufacture thereof
08/19/2014US8810016 Semiconductor device, substrate and semiconductor device manufacturing method
08/19/2014US8810014 Semiconductor package including conductive member disposed between the heat dissipation member and the lead frame
08/19/2014US8810013 Integrated power converter package with die stacking
08/19/2014US8810012 Chip package, method for forming the same, and package wafer
08/19/2014US8810011 Semiconductor device and method of forming shielding layer over semiconductor die mounted to TSV interposer
08/19/2014US8810010 Semiconductor device and method for fabricating the same
08/19/2014US8810007 Wiring board, semiconductor device, and method for manufacturing wiring board
08/19/2014US8810006 Interposer system and method
08/19/2014US8810004 Methods, systems and devices for electrostatic discharge protection
08/19/2014US8809997 E-fuse structures and methods of operating and manufacturing the same
08/19/2014US8809995 Through silicon via noise suppression using buried interface contacts
08/19/2014US8809983 Semiconductor device, manufacturing method therefor, and electronic apparatus
08/19/2014US8809972 Apparatus integrating microelectromechanical system device with circuit chip and methods for fabricating the same
08/19/2014US8809966 Semiconductor device
08/19/2014US8809961 Electrostatic discharge (ESD) guard ring protective structure
08/19/2014US8809951 Chip packages having dual DMOS devices with power management integrated circuits
08/19/2014US8809859 Devices and methods for embedding semiconductors in printed circuit boards
08/19/2014US8809784 Incident radiation detector packaging
08/19/2014US8809734 Methods and systems for thermal-based laser processing a multi-material device
08/19/2014US8809695 Contact structure for an electronic circuit substrate and electronic circuit comprising said contact structure
08/19/2014US8809694 Circuit module
08/19/2014US8809692 Wiring board
08/19/2014US8809478 Silicon-containing curable composition, cured product of the silicon-containing curable composition and lead frame substrate formed of the silicon-containing curable composition
08/19/2014US8809208 Nano-tube thermal interface structure
08/19/2014US8809184 Methods of forming contacts for semiconductor devices using a local interconnect processing scheme
08/19/2014US8809162 Method for manufacturing a semiconductor device comprising a guard ring between a cell region and a peripheral region
08/19/2014US8809141 High performance CMOS transistors using PMD liner stress
08/19/2014US8809127 Curable compositon
08/19/2014US8809124 Bumpless build-up layer and laminated core hybrid structures and methods of assembling same
08/19/2014US8809119 Integrated circuit packaging system with plated leads and method of manufacture thereof
08/19/2014US8809116 Method for wafer level packaging of electronic devices
08/19/2014US8809088 Structure of stacking chips and method for manufacturing the same
08/19/2014US8809081 Electronic device and method of manufacturing an electronic device
08/19/2014US8808455 Substrate processing apparatus and method of manufacturing semiconductor device
08/19/2014US8807068 Equipment and method for manufacturing semiconductor device
08/19/2014US8806814 Photovoltaic array system, photovoltaic device thereof, and frame element of photovoltaic device thereof
08/19/2014US8806749 Two-phase, water-based immersion-cooling apparatus with passive deionization
08/19/2014DE202014005979U1 Befestigungsstruktur des Wärmeleitpads eines Kühlmoduls Mounting structure of the thermal pads a cooling module
08/19/2014CA2715344C Semiconductor element module and method for manufacturing the same
08/14/2014WO2014124044A1 Self-similar and fractal design for stretchable electronics
08/14/2014WO2014123790A1 Substrate-less discrete coupled inductor structure
08/14/2014WO2014123783A2 Small form factor magnetic shield for magnetorestrictive random access memory (mram)
08/14/2014WO2014123774A1 Heat sink
08/14/2014WO2014072681A3 Component temperature control
08/14/2014US20140228222 Systems and methods for superconducting integrated circuits
08/14/2014US20140227835 Process for improving package warpage and connection reliability through use of a backside mold configuration (bsmc)
08/14/2014US20140227834 Method for incorporating stress sensitive chip scale components into reconstructed wafer based modules
08/14/2014US20140227833 Sensor array package
08/14/2014US20140227831 Front Side Copper Post Joint Structure for Temporary Bond in TSV Application
08/14/2014US20140227830 Method for fabricating quad flat non-leaded package structure with electromagnetic interference shielding function
08/14/2014US20140227829 Using interrupted through-silicon-vias in integrated circuits adapted for stacking
08/14/2014US20140227477 Methods for Reducing Thermal Resistance of Carbon Nanotube Arrays or Sheets
08/14/2014US20140227462 Wiring structure for display device
08/14/2014US20140226690 Device package and methods for the fabrication and testing thereof
08/14/2014US20140226297 Method of manufacturing connection structure
08/14/2014US20140225661 Semiconductor Device with Bypass Functionality and Method Thereof
08/14/2014US20140225284 Low-cost chip package for chip stacks
08/14/2014US20140225283 Wafer back side coating as dicing tape adhesive
08/14/2014US20140225281 Semiconductor Package Including Multiple Chips and Separate Groups of Leads
08/14/2014US20140225280 Semiconductor device having stacked memory elements and method of stacking memory elements on a semiconductor device
08/14/2014US20140225279 Semiconductor Device and Method of Forming Insulating Layer in Notches Around Conductive TSV for Stress Relief
08/14/2014US20140225278 Interconnection structure for an integrated circuit
08/14/2014US20140225277 Isolation Structure for Stacked Dies
08/14/2014US20140225276 Chip package
08/14/2014US20140225275 Wiring substrate and method of manufacturing the same
08/14/2014US20140225274 Method for Producing Structured Sintered Connection Layers, and Semiconductor Element Having a Structured Sintered Connection Layer
08/14/2014US20140225273 Chip package for high-count chip stacks
08/14/2014US20140225272 Embedded electronic device package structure
08/14/2014US20140225271 Panelized packaging with transferred dielectric
08/14/2014US20140225270 Method for off-grid routing structures utilizing self aligned double patterning (sadp) technology
08/14/2014US20140225269 Solder and die-bonding structure
08/14/2014US20140225268 Methods and structures for reducing stress on die assembly
08/14/2014US20140225267 Solderless Die Attach to a Direct Bonded Aluminum Substrate
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