Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
09/2014
09/09/2014US8829645 Structure and method to form e-fuse with enhanced current crowding
09/09/2014US8829628 MEMS package structure
09/09/2014US8829603 Shielded gate trench MOSFET package
09/09/2014US8829572 Structure and layout of a FET prime cell
09/09/2014US8829565 High voltage electrostatic discharge protection device
09/09/2014US8829534 Power semiconductor device
09/09/2014US8829488 Process for preparing a bonding type semiconductor substrate
09/09/2014US8829483 Semiconductor device and manufacturing method thereof
09/09/2014US8829362 Electronic device having member which functions as ground conductor and radiator
09/09/2014US8829356 Packaging substrate having a passive element embedded therein and method of fabricating the same
09/09/2014US8829355 Multilayer printed wiring board
09/09/2014US8828888 Protection of reactive metal surfaces of semiconductor devices during shipping by providing an additional protection layer
09/09/2014US8828873 Method for manufacturing semiconductor device
09/09/2014US8828870 Microstructure modification in copper interconnect structures
09/09/2014US8828865 Method of forming metal interconnections of semiconductor device
09/09/2014US8828862 Air-dielectric for subtractive etch line and via metallization
09/09/2014US8828861 Method for fabricating conductive lines of a semiconductor device
09/09/2014US8828846 Method of computing a width of a scribe region based on a bonding structure that extends into the scribe reigon in a wafer-level chip scale (WLCSP) packaging
09/09/2014US8828842 Crack stop structure and method for forming the same
09/09/2014US8828830 Semiconductor device having STI with nitride liner and UV light shielding film
09/09/2014US8828829 Semiconductor device with air gaps and method for fabricating the same
09/09/2014US8828807 Method of packaging integrated circuits and a molded substrate with non-functional placeholders embedded in a molding compound
09/09/2014US8828806 Dam composition for use with multilayer semiconductor package underfill material, and fabrication of multilayer semiconductor package using the same
09/09/2014US8828805 Manufacturing method of semiconductor device
09/09/2014US8828803 Resin sealing method for semiconductor chips
09/09/2014US8828802 Wafer level chip scale package and method of fabricating wafer level chip scale package
09/09/2014US8828801 Leadless array plastic package with various IC packaging configurations
09/09/2014US8828800 Method of forming adaptive interconnect structure having programmable contacts
09/09/2014US8828799 Method of forming an integrated circuit package including a direct connect pad, a blind via, and a bond pad electrically coupled to the direct connect pad
09/09/2014US8828798 Semiconductor die assemblies, semiconductor devices including same, and methods of fabrication
09/09/2014US8828797 Process for assembling two parts of a circuit
09/09/2014US8828796 Semiconductor package and method of manufacturing the same
09/09/2014US8828795 Method of fabricating semiconductor package having substrate with solder ball connections
09/09/2014US8828749 Methodology for evaluation of electrical characteristics of carbon nanotubes
09/09/2014US8828521 Corrugated interfaces for multilayered interconnects
09/09/2014US8826668 Two stage serial impingement cooling for isogrid structures
09/09/2014US8826527 Electronic component-embedded printed circuit board and method of manufacturing the same
09/09/2014CA2637038C Apparatus and methods for packaging integrated cirguit chips with antennas formed from package lead wires
09/04/2014WO2014134118A1 Microelectronic package with consolidated chip structures
09/04/2014WO2014134113A1 Microelectronic unit and package with positional reversal
09/04/2014WO2014134001A1 Method for aligning a biochip
09/04/2014WO2014133883A1 High quality factor inductor implemented in wafer level packaging (wlp)
09/04/2014WO2014133838A1 External moisture barrier package for circuit board electrical component
09/04/2014WO2014133808A1 A vertical-coupling transformer with an air-gap structure
09/04/2014WO2014133513A1 Symmetric baluns and isolation techniques
09/04/2014WO2014133390A1 Mould, carrier with encapsulated electronic components, separated encapsulated electronic component and method for encapsulating electronic components
09/04/2014WO2014132242A1 Segmented guard ring structures with electrically insulated gap structures and design structures thereof
09/04/2014WO2014131460A1 Cooling heat generating components
09/04/2014WO2014131152A1 Semiconductor device including alternating stepped semiconductor die stacks
09/04/2014WO2014113113A3 Integrated circuit chip temperature sensor
09/04/2014WO2014110480A3 Diplexer design using through glass via technology
09/04/2014US20140248747 Chip-on-lead package and method of forming
09/04/2014US20140248746 Making a flip-chip assembly with bond fingers
09/04/2014US20140248743 Semiconductor memory modules and methods of fabricating the same
09/04/2014US20140248741 Package-on-package assembly and method
09/04/2014US20140248504 Resin composition, resin sheet, cured resin sheet, resin-adhered metal foil and heat dissipation device
09/04/2014US20140248477 Buffer film for multi-chip packaging
09/04/2014US20140247574 Printed circuit board
09/04/2014US20140247572 Printed circuit board
09/04/2014US20140247557 Phase-change chamber with patterned regions of high and low affinity to a phase-change medium for electronic device cooling
09/04/2014US20140246791 14 lpm contact power rail
09/04/2014US20140246790 Floating bond pad for power semiconductor devices
09/04/2014US20140246789 Semiconductor device with a semiconductor chip connected in a flip chip manner
09/04/2014US20140246786 Stacked packages having through hole vias
09/04/2014US20140246785 Package on Package Structure
09/04/2014US20140246784 Semiconductor structures including tight pitch contacts
09/04/2014US20140246783 Semiconductor device and method for manufacturing the semiconductor device
09/04/2014US20140246782 Semiconductor devices and methods for fabricating the same
09/04/2014US20140246780 Semiconductor device including dummy pattern
09/04/2014US20140246779 Semiconductor Device and Method of Forming Insulating Layer Disposed Over the Semiconductor Die For Stress Relief
09/04/2014US20140246778 Semiconductor device, wireless device, and storage device
09/04/2014US20140246777 Controlled metal extrusion opening in semiconductor structure and method of forming
09/04/2014US20140246776 Doping of copper wiring structures in back end of line processing
09/04/2014US20140246775 Methods of forming non-continuous conductive layers for conductive structures on an integrated circuit product
09/04/2014US20140246774 Semiconductor device having a buffer layer and method of manufacturing the same
09/04/2014US20140246773 Chip on Chip Attach (Passive IPD and PMIC) Flip Chip BGA Using New Cavity BGA Substrate
09/04/2014US20140246772 Passivation Scheme
09/04/2014US20140246771 Package substrate, method of manufacturing the package substrate and semiconductor package including the package substrate
09/04/2014US20140246770 Copper nanorod-based thermal interface material (tim)
09/04/2014US20140246769 Semiconductor device and semiconductor device manufacturing method
09/04/2014US20140246768 Semiconductor device and manufacturing method of semiconductor device
09/04/2014US20140246767 Semiconductor device and method of assembling same
09/04/2014US20140246766 Semiconductor Chip Package
09/04/2014US20140246765 Printed wiring board
09/04/2014US20140246764 Rolled-up transmission line structure for a radiofrequency integrated circuit (rfic)
09/04/2014US20140246757 Thermally-optimized metal fill for stacked chip systems
09/04/2014US20140246753 High quality factor inductor implemented in wafer level packaging (wlp)
09/04/2014US20140246703 Semiconductor integrated circuit device
09/04/2014US20140246480 Automatic rework processes for non-stick conditions in wire bonding operations
09/04/2014DE112012005459T5 Halbleitervorrichtung Semiconductor device
09/04/2014DE112012005457T5 Halbleitervorrichtung Semiconductor device
09/04/2014DE112012005299T5 Halbleitervorrichtung und Halbleitersystem Semiconductor device and semiconductor system
09/04/2014DE112012005288T5 Struktur einer Bindungsstelle und deren Bindungsverfahren sowie elektrisches Bauteil Structure of a binding site and the binding process and electrical component
09/04/2014DE112012005226T5 Leistungshalbleitermodul und Leistungsmodul The power semiconductor module and power module
09/04/2014DE112011106034T5 Verfahren zum Herstellen eines Halbleiterbauelementes A method of manufacturing a semiconductor device
09/04/2014DE10394239B4 Verfahren zum Verpacken integrierter Schaltungen und integriertes Schaltungsgehäuse A method of packaging of integrated circuits and integrated circuit package
09/04/2014DE10262345B4 Halbleiterbauelement mit einer Siliziumcarbidschicht mit vorbestimmtem Leitfähigkeitstyp Semiconductor device with a silicon carbide layer having a predetermined conductivity type
09/04/2014DE102014102703A1 Halbleiterchip-Baugruppe A semiconductor chip assembly
09/04/2014DE102013203664A1 Substrat für Leuchtvorrichtung mit Keramikbereich Substrate for light-emitting device with ceramic range
09/04/2014DE102013203532A1 Bauteilekühlung Components Cooling
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