Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
09/2014
09/23/2014US8841064 Positive photosensitive resin composition, photosensitive resin film prepared by using the same, and semiconductor device including the photosensitive resin film
09/23/2014US8841002 Method of room temperature covalent bonding
09/23/2014US8840811 Electrically conductive bonding material, method of bonding with the same, and semiconductor device bonded with the same
09/23/2014US8840553 Analyte monitoring device and methods of use
09/23/2014US8839519 Method of making cold chassis for electronic modules
09/23/2014US8839512 Oblique parts or surfaces
09/23/2014US8839509 Method for manufacturing electronic apparatus
09/23/2014US8839508 Method of making a high frequency device package
09/18/2014WO2014145623A1 Transformer-based power amplifier stabilization and reference distortion reduction
09/18/2014WO2014144362A1 Display device
09/18/2014WO2014144180A1 Electrodeposition of silver with fluoropolymer nanoparticles
09/18/2014WO2014143385A1 Circuits for and methods of implementing a gain stage in an integrated circuit comprising two inductors of different diameter
09/18/2014WO2014143330A1 Memory module having unified pcb design for ssd applications
09/18/2014WO2014143254A1 Thermoelectric assembly
09/18/2014WO2014142310A1 Bonded body, substrate for power modules, and substrate with heat sink for power modules
09/18/2014WO2014142154A1 Reinforcing sheet and process for producing semiconductor device through secondary mounting
09/18/2014WO2014142123A1 Thermally conductive insulating sheet, power module, and manufacturing method for same
09/18/2014WO2014142076A1 Semiconductor device
09/18/2014WO2014142075A1 Semiconductor device
09/18/2014WO2014141607A1 Semiconductor device and method of manufacturing semiconductor device
09/18/2014WO2014141346A1 Semiconductor device
09/18/2014WO2014140796A1 Wafer-level flip chip device packages and related methods
09/18/2014WO2014140098A1 Heat spreader with flat pipe cooling element
09/18/2014WO2014139851A1 Carrier component having a semiconductor substrate for electronic components and method for producing said carrier component
09/18/2014WO2014139826A1 A flow distributor comprising customisable flow restriction devices
09/18/2014WO2014139674A1 Electronic sub-assembly and method for the production of an electronic sub-assembly
09/18/2014WO2014139666A1 Electronic sub-assembly, method for the production thereof and printed circuit board having an electronic sub-assembly
09/18/2014WO2014139569A1 Methods for jetting viscous medium on workpiece
09/18/2014WO2014139519A2 Metal ceramic substrate and method for producing a metal ceramic substrate
09/18/2014WO2014139429A1 Circuit and method for a multi-mode filter
09/18/2014US20140273825 Semiconductor Chip Configuration with a Coupler
09/18/2014US20140273453 Semiconductor device and method for manufacturing semiconductor device
09/18/2014US20140273440 Semiconductor device channels
09/18/2014US20140273439 Semiconductor device channels
09/18/2014US20140273431 Laser resist removal for integrated circuit (ic) packaging
09/18/2014US20140273401 Substrate laser dicing mask including laser energy absorbing water-soluble film
09/18/2014US20140273353 Method of manufacturing semiconductor device
09/18/2014US20140273349 Power Module Having Stacked Flip-Chip and Method for Fabricating the Power Module
09/18/2014US20140273348 Package-on-package electronic devices including sealing layers and related methods of forming the same
09/18/2014US20140273347 Methods for Hybrid Wafer Bonding Integrated with CMOS Processing
09/18/2014US20140273345 Methods for bonding a hermetic module to an electrode array
09/18/2014US20140273344 Method for fabricating stack die package
09/18/2014US20140272316 Transparent substrate having nano pattern and method of manufacturing the same
09/18/2014US20140268984 Semiconductor device and electronic apparatus
09/18/2014US20140268619 Method of Manufacturing Substrate for Chip Packages and Method of Manufacturing Chip Package
09/18/2014US20140268612 Coreless substrate with passive device pads
09/18/2014US20140268609 Support structure for integrated circuitry
09/18/2014US20140268586 Semiconductor package and printed circuit board
09/18/2014US20140268575 Implementing heat sink loading having multipoint loading with actuation outboard of heatsink footprint
09/18/2014US20140268448 Method and apparatus of esd protection in stacked die semiconductor device
09/18/2014US20140266418 Stacked Chip System
09/18/2014US20140266417 Ground-referenced single-ended signaling connected graphics processing unit multi-chip module
09/18/2014US20140266286 Through-substrate via with a fuse structure
09/18/2014US20140264962 Wafer Mapping Process Control with Indicator Line
09/18/2014US20140264961 Invisible Dummy Features and Method for Forming the Same
09/18/2014US20140264960 Encapsulation of advanced devices using novel pecvd and ald schemes
09/18/2014US20140264959 Hardening resin composition, sealing material, and electronic device using the sealing material
09/18/2014US20140264958 Semiconductor package, fabrication method thereof and molding compound
09/18/2014US20140264957 Robust ink formulations for durable markings on microelectronic packages and its extendibility as a barrier material for thermal and sealant materials
09/18/2014US20140264956 Sealant laminated composite, sealed semiconductor devices mounting substrate, sealed semiconductor devices forming wafer, semiconductor apparatus, and method for manufacturing semiconductor apparatus
09/18/2014US20140264955 Electronic device with an interlocking mold package
09/18/2014US20140264954 Passivation and warpage correction by nitride film for molded wafers
09/18/2014US20140264953 Wiring structures, methods of manufacturing the same, and methods of manufacturing semiconductor devices having the same
09/18/2014US20140264952 Supplementing wire bonds
09/18/2014US20140264951 Laser die backside film removal for integrated circuit (ic) packaging
09/18/2014US20140264950 Chip arrangement and a method of manufacturing a chip arrangement
09/18/2014US20140264949 Gold die bond sheet preform
09/18/2014US20140264948 Air Trench in Packages Incorporating Hybrid Bonding
09/18/2014US20140264947 Interconnect Apparatus and Method
09/18/2014US20140264946 Package-on-package structure with reduced height
09/18/2014US20140264945 Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof
09/18/2014US20140264944 Semiconductor Package with Top-Side Insulation Layer
09/18/2014US20140264943 Multiple-patterned semiconductor device channels
09/18/2014US20140264942 Semiconductor device channels
09/18/2014US20140264941 Three-Dimensional Semiconductor Architecture
09/18/2014US20140264940 Semiconductor package and package on package having the same
09/18/2014US20140264939 Semiconductor device
09/18/2014US20140264938 Flexible Interconnect
09/18/2014US20140264937 Through-Silicon Vias and Interposers Formed by Metal-Catalyzed Wet Etching
09/18/2014US20140264936 Semiconductor package
09/18/2014US20140264935 Semiconductor device manufacturing method and semiconductor mounting substrate
09/18/2014US20140264934 Interlayer conductor structure and method
09/18/2014US20140264933 Wafer Level Chip Scale Packaging Intermediate Structure Apparatus and Method
09/18/2014US20140264932 Patterning Approach to Reduce Via to Via Minimum Spacing
09/18/2014US20140264931 Stress Tuning for Reducing Wafer Warpage
09/18/2014US20140264930 Fan-Out Interconnect Structure and Method for Forming Same
09/18/2014US20140264929 Interconnect Structure for Stacked Device
09/18/2014US20140264928 Semiconductor package and fabrication method thereof
09/18/2014US20140264927 Single Mask Package Apparatus and Method
09/18/2014US20140264926 Method and Apparatus for Back End of Line Semiconductor Device Processing
09/18/2014US20140264925 Interlayer conductor and method for forming
09/18/2014US20140264924 Apparatus and method for mitigating dynamic ir voltage drop and electromigration affects
09/18/2014US20140264923 Interconnect structure with kinked profile
09/18/2014US20140264922 Semiconductor structure
09/18/2014US20140264921 Through-silicon via with sidewall air gap
09/18/2014US20140264920 Metal Cap Apparatus and Method
09/18/2014US20140264919 Chip arrangement, wafer arrangement and method of manufacturing the same
09/18/2014US20140264918 Integrated Circuit Layout
09/18/2014US20140264917 A Semiconductor Device with a Through-Silicon Via and a Method for Making the Same
09/18/2014US20140264916 An Integrated Structure with a Silicon-Through Via
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