Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
10/2010
10/26/2010US7821141 Semiconductor device
10/26/2010US7821140 Semiconductor device and wire bonding method
10/26/2010US7821138 Semiconductor device with an improved operating property
10/26/2010US7821136 layer of metal composite is applied on substrate, comprising metal flakes, nanometer metal spheres, and metal precursors; precursors comprise mixture of inorganic salts and organic acidic salts; layer of metal composite is cured to induce exothermic reaction, forming a conductive layer at low temperature
10/26/2010US7821135 Semiconductor device with improved stress migration resistance and manufacturing process therefor
10/26/2010US7821134 Semiconductor device, electronic device and fabrication method of the same
10/26/2010US7821132 Contact pad and method of forming a contact pad for an integrated circuit
10/26/2010US7821131 Substrate including barrier solder bumps to control underfill transgression and microelectronic package including same
10/26/2010US7821130 Module including a rough solder joint
10/26/2010US7821129 Low cost hermetic ceramic microcircuit package
10/26/2010US7821128 Power semiconductor device having lines within a housing
10/26/2010US7821127 Semiconductor device package having buffered memory module and method thereof
10/26/2010US7821126 Heat sink with preattached thermal interface material and method of making same
10/26/2010US7821124 Thin, thermally enhanced flip chip in a leaded molded package
10/26/2010US7821123 LED array cooling system
10/26/2010US7821122 Method and system for increasing circuitry interconnection and component capacity in a multi-component package
10/26/2010US7821121 Semiconductor device and method for producing the same
10/26/2010US7821120 Metal filled through via structure for providing vertical wafer-to-wafer interconnection
10/26/2010US7821119 Semiconductor device
10/26/2010US7821118 Power distribution pattern for a ball grid array
10/26/2010US7821117 Semiconductor package with mechanical stress isolation of semiconductor die subassembly
10/26/2010US7821116 Semiconductor die package including leadframe with die attach pad with folded edge
10/26/2010US7821115 Tape carrier package including a heat dissipation element
10/26/2010US7821114 Multiphase synchronous buck converter
10/26/2010US7821113 Leadframe having delamination resistant die pad
10/26/2010US7821112 Semiconductor device with wire-bonding on multi-zigzag fingers
10/26/2010US7821111 Semiconductor device having grooved leads to confine solder wicking
10/26/2010US7821110 Circuit structures and methods with BEOL layer(s) configured to block electromagnetic interference
10/26/2010US7821109 Stressed dielectric devices and methods of fabricating same
10/26/2010US7821106 Process for making contact with and housing integrated circuits
10/26/2010US7821105 Method of manufacturing semiconductor device and semiconductor device
10/26/2010US7821104 Package device having crack arrest feature and method of forming
10/26/2010US7821099 Structure for low capacitance ESD robust diodes
10/26/2010US7821078 Semiconductor device having resistor elements and method for manufacturing the same
10/26/2010US7821076 Semiconductor device
10/26/2010US7821074 Semiconductor device and method for manufacturing same
10/26/2010US7821070 Trig modulation electrostatic discharge (ESD) protection devices
10/26/2010US7821069 Semiconductor device and method for manufacturing the same
10/26/2010US7821062 Field effect transistor and method for producing a field effect transistor
10/26/2010US7821039 Layout architecture for improving circuit performance
10/26/2010US7820920 Casing and mounting device
10/26/2010US7820919 Electronic circuit packages
10/26/2010US7820559 Structure to improve adhesion between top CVD low-K dielectric and dielectric capping layer
10/26/2010US7820543 Enhanced copper posts for wafer level chip scale packaging
10/26/2010US7820528 Method of forming a leaded molded array package
10/26/2010US7820493 Methods of making and using fuse structures, and integrated circuits including the same
10/26/2010US7820490 Method for LTCC circuitry
10/26/2010US7820486 Method of fabricating a semiconductor device having a heat sink with an exposed surface
10/26/2010US7820484 Wafer level packaging
10/26/2010US7820482 Method of producing an electronic component with flexible bonding
10/26/2010US7820480 Lead frame routed chip pads for semiconductor packages
10/26/2010US7820469 Stress-controlled dielectric integrated circuit
10/26/2010US7820459 Methods relating to the reconstruction of semiconductor wafers for wafer level processing including forming of alignment protrusion and removal of alignment material
10/26/2010US7819556 Thermal management system for LED array
10/26/2010US7819033 Process condition sensing wafer and data analysis system
10/26/2010CA2341280C Mo-cu composite powder
10/21/2010WO2010121230A1 Cooling device, electronic substrate and electronic device
10/21/2010WO2010121167A1 Floating metal elements in a package substrate
10/21/2010WO2010120697A1 Thermoelectric alloys with improved thermoelectric power factor
10/21/2010WO2010120428A2 Robust esd protection circuit, method and design structure for tolerant and failsafe designs
10/21/2010WO2010119762A1 Semiconductor device and method for manufacturing semiconductor device
10/21/2010WO2010119652A1 Electronic device mounting structure and electronic device mounting method
10/21/2010WO2010119575A1 Surface-mounted led lead frame and method for manufacturing same
10/21/2010WO2010119573A1 Inertial sensor and method for manufacturing the same
10/21/2010WO2010119570A1 Multilayer semiconductor device and method for manufacturing multilayer semiconductor device
10/21/2010WO2010119514A1 Power supply device
10/21/2010WO2010119436A1 A voltage suppressor component
10/21/2010WO2010119416A2 Foil and method for foil-based clip-and/or wire-bonding and resulting package
10/21/2010WO2010119360A1 Single side rail substrate
10/21/2010WO2010118971A1 Housing for an on-board electronic card
10/21/2010WO2010096213A3 Integrated circuit micro-module
10/21/2010WO2010068648A3 Semiconductor die package including low stress configuration
10/21/2010US20100268050 Analyte Monitoring Device and Methods of Use
10/21/2010US20100268049 Analyte Monitoring Device and Methods of Use
10/21/2010US20100268048 Analyte Monitoring Device and Methods of Use
10/21/2010US20100268047 Analyte Monitoring Device and Methods of Use
10/21/2010US20100268046 Analyte Monitoring Device and Methods of Use
10/21/2010US20100268045 Analyte Monitoring Device and Methods of Use
10/21/2010US20100268044 Analyte Monitoring Device and Methods of Use
10/21/2010US20100267206 Semiconductor die package including heat sinks
10/21/2010US20100267205 Carbon nanotubes for the selective transfer of heat from electronics
10/21/2010US20100267176 Light emitting apparatus and fabrication method thereof
10/21/2010US20100265751 Multi-chip packages providing reduced signal skew and related methods of operation
10/21/2010US20100265744 Power semiconductor module
10/21/2010US20100265372 Solid-state imaging device and imaging apparatus
10/21/2010US20100264815 Organic electroluminescence device and manufacturing method thereof
10/21/2010US20100264553 Packaged electronic device having metal comprising self-healing die attach material
10/21/2010US20100264552 Circuit device, method of manufacturing the circuit device, device mounting board and semiconductor module
10/21/2010US20100264550 Self-aligned contact
10/21/2010US20100264549 Trench Substrate and Method Of Manufacturing The Same
10/21/2010US20100264548 Through substrate vias
10/21/2010US20100264547 Semiconductor device and method for manufacturing
10/21/2010US20100264546 Semiconductor device and manufacturing method thereof
10/21/2010US20100264545 Metal Fill Structures for Reducing Parasitic Capacitance
10/21/2010US20100264544 Device including contact structure and method of forming the same
10/21/2010US20100264543 Interconnect structure
10/21/2010US20100264542 Dynamic pad size to reduce solder fatigue
10/21/2010US20100264541 Methods of fluxless micro-piercing of solder balls, and resulting devices
10/21/2010US20100264540 IC Package Reducing Wiring Layers on Substrate and Its Carrier
10/21/2010US20100264539 Semiconductor device and method of manufacturing the same
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