Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
05/2011
05/17/2011US7944043 Semiconductor device having improved contact interface reliability and method therefor
05/17/2011US7944042 Semiconductor device and method of manufacturing same
05/17/2011US7944041 Integrated semiconductor substrate structure using incompatible processes
05/17/2011US7944040 Semiconductor device and electronic apparatus equipped with the semiconductor device
05/17/2011US7944039 Semiconductor device and method of manufacturing the same
05/17/2011US7944038 Semiconductor package having an antenna on the molding compound thereof
05/17/2011US7944037 Semiconductor device and semiconductor memory device
05/17/2011US7944036 Semiconductor device including mounting board with stitches and first and second semiconductor chips
05/17/2011US7944035 Double sided semiconduction device with edge contact and package therefor
05/17/2011US7944034 Array molded package-on-package having redistribution lines
05/17/2011US7944033 Power semiconductor module
05/17/2011US7944032 Integrated circuit package with molded insulation
05/17/2011US7944031 Leadframe-based chip scale semiconductor packages
05/17/2011US7944030 Lead frame and method of manufacturing the same
05/17/2011US7944029 Non-volatile memory with reduced mobile ion diffusion
05/17/2011US7944027 Lead frame, semiconductor device, and method of manufacturing the semiconductor device
05/17/2011US7944005 Semiconductor device and method for fabricating the same
05/17/2011US7943996 Semiconductor device and semiconductor integrated circuit using the same
05/17/2011US7943977 Image sensor and method for manufacturing the same that uses thermoelectric device for cooling
05/17/2011US7943961 Strain bars in stressed layers of MOS devices
05/17/2011US7943960 Integrated circuit arrangement including a protective structure
05/17/2011US7943959 Low capacitance semiconductor device
05/17/2011US7943958 High holding voltage LVTSCR-like structure
05/17/2011US7943934 Thin film transistor array panel and method for manufacturing the same
05/17/2011US7943868 Sealed housing, a kit of parts including at least one housing, a combination including the housing or a kit of parts and a use of a friction enhancing element
05/17/2011US7943517 Semiconductor device with a barrier film
05/17/2011US7943506 Semiconductor device and production method therefor
05/17/2011US7943505 Advanced VLSI metallization
05/17/2011US7943503 Trench interconnect structure and formation method
05/17/2011US7943480 Sub-lithographic dimensioned air gap formation and related structure
05/17/2011US7943437 Apparatus and method for electronic fuse with improved ESD tolerance
05/17/2011US7943436 Integrated circuit devices and methods and apparatuses for designing integrated circuit devices
05/17/2011US7943431 Leadless semiconductor package and method of manufacture
05/17/2011US7943430 Semiconductor device with heat sink and method for manufacturing the same
05/17/2011US7943421 Component stacking using pre-formed adhesive films
05/17/2011US7943064 Organic species that facilitate charge transfer to or from nanostructures
05/17/2011CA2581075C Composite material for producing high-thermally conductive ribs for heat exchangers
05/12/2011WO2011056987A2 Stacked die assembly having reduced stress electrical interconnects
05/12/2011WO2011056955A1 Interconnect sensor for detecting delamination
05/12/2011WO2011056668A2 Selective die electrical insulation additive process
05/12/2011WO2011056527A2 Methods and apparatus for layout of three dimensional matrix array memory for reduced cost patterning
05/12/2011WO2011056309A2 Microelectronic package and method of manufacturing same
05/12/2011WO2011056306A2 Microelectronic package and method of manufacturing same
05/12/2011WO2011055984A2 Leadframe and method of manufacuring the same
05/12/2011WO2011055825A1 Etching liquid for etching silicon substrate rear surface in through silicon via process and method for manufacturing semiconductor chip having through silicon via using the etching liquid
05/12/2011WO2011055028A1 Contact device for improving the heat dissipation of heat-generating apparatuses
05/12/2011WO2011054554A1 Metallurgical clamshell methods for micro land grid array fabrication
05/12/2011WO2010057236A3 Heat sink and method for the production thereof
05/12/2011US20110112389 Analyte Monitoring Device and Methods of Use
05/12/2011US20110111590 Device and methodology for reducing effective dielectric constant in semiconductor devices
05/12/2011US20110110065 Integrated Circuit Die Stacks Having Initially Identical Dies Personalized With Switches
05/12/2011US20110110064 Integrating Circuit Die Stacks Having Initially Identical Dies Personalized With Fuses
05/12/2011US20110110062 Stack-type semiconductor device having chips having different backside structure and electronic apparatus including the same
05/12/2011US20110109779 Solid-state imaging device, its production method, camera with the solid-state imaging device, and light receiving chip
05/12/2011US20110109287 Semiconductor package and dc-dc converter
05/12/2011US20110109000 Semiconductor package and method of forming the same
05/12/2011US20110108999 Microelectronic package and method of manufacturing same
05/12/2011US20110108998 Use of discrete conductive layer in semiconductor device to re-route bonding wires for semiconductor device package
05/12/2011US20110108997 Mounting method and mounting structure for semiconductor package component
05/12/2011US20110108995 Spiral staircase shaped stacked semiconductor package and method for manufacturing the same
05/12/2011US20110108994 Integrated circuits and methods for forming the integrated circuits
05/12/2011US20110108993 Semiconductor package and manufacturing method thereof
05/12/2011US20110108992 Air gap interconnect structures and methods for forming the same
05/12/2011US20110108991 Circuit layout structure
05/12/2011US20110108990 Capping of Copper Interconnect Lines in Integrated Circuit Devices
05/12/2011US20110108989 Process for reversing tone of patterns on integerated circuit and structural process for nanoscale fabrication
05/12/2011US20110108988 Via structures and semiconductor devices having the via structures
05/12/2011US20110108987 Semiconductor device
05/12/2011US20110108986 Through-silicon via structure and a process for forming the same
05/12/2011US20110108985 Semiconductor device and method for manufacturing the same
05/12/2011US20110108984 Circuit board and chip package structure
05/12/2011US20110108983 Integrated Circuit
05/12/2011US20110108982 Printed circuit board
05/12/2011US20110108981 Redistribution layer enhancement to improve reliability of wafer level packaging
05/12/2011US20110108980 Stable gold bump solder connections
05/12/2011US20110108979 Semiconductor device and display apparatus
05/12/2011US20110108978 Graphene nanoplatelet metal matrix
05/12/2011US20110108977 Package structure and manufacturing method thereof
05/12/2011US20110108975 Semiconductor package and system
05/12/2011US20110108974 Power and signal distribution of integrated circuits
05/12/2011US20110108973 Chip package structure and method for fabricating the same
05/12/2011US20110108971 Laminate electronic device
05/12/2011US20110108970 Semiconductor flip chip package having substantially non-collapsible spacer and method of manufacture thereof
05/12/2011US20110108969 Integrated circuit packaging system with leads and method of manufacture thereof
05/12/2011US20110108968 Semiconductor package with metal straps
05/12/2011US20110108967 Semiconductor chip grid array package and method for fabricating same
05/12/2011US20110108966 Integrated circuit packaging system with concave trenches and method of manufacture thereof
05/12/2011US20110108965 Semiconductor device package
05/12/2011US20110108964 Semiconductor device and manufacturing method thereof
05/12/2011US20110108963 Package for a power semiconductor device
05/12/2011US20110108962 Semiconductor device having a device isolation structure
05/12/2011US20110108959 Semiconductor Component Having Through Wire Interconnect With Compressed Bump
05/12/2011US20110108958 Metal Oxide Semiconductor (MOS)-Compatible High-Aspect Ratio Through-Wafer Vias and Low-Stress Configuration Thereof
05/12/2011US20110108957 Semiconductor substrate, semiconductor device and method of manufacturing the same
05/12/2011US20110108947 Microelectronic device and method of manufacturing same
05/12/2011US20110108946 Fuse of semiconductor device and method for forming the same
05/12/2011US20110108942 Method for producing field effect transistors with a back gate and semiconductor device
05/12/2011US20110108931 Anodic bondable porcelain and composition for the porcelain
05/12/2011US20110108891 Semiconductor Device with Dynamic Array Sections Defined and Placed According to Manufacturing Assurance Halos
05/12/2011US20110108890 Semiconductor Device with Dynamic Array Sections Defined and Placed According to Manufacturing Assurance Halos