Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
09/2011
09/20/2011US8022515 Semiconductor device
09/20/2011US8022514 Integrated circuit package system with leadfinger support
09/20/2011US8022513 Packaging substrate structure with electronic components embedded in a cavity of a metal block and method for fabricating the same
09/20/2011US8022512 No lead package with heat spreader
09/20/2011US8022511 Semiconductor device packages with electromagnetic interference shielding
09/20/2011US8022509 Crack stopping structure and method for fabricating the same
09/20/2011US8022508 Semiconductor wafer
09/20/2011US8022505 Semiconductor device structure and integrated circuit therefor
09/20/2011US8022503 Anti-fusse structure and method of fabricating the same
09/20/2011US8022501 Semiconductor device and method for isolating the same
09/20/2011US8022497 Semiconductor device comprising insulating film
09/20/2011US8022482 Device configuration of asymmetrical DMOSFET with schottky barrier source
09/20/2011US8022443 Memory and interconnect design in fine pitch
09/20/2011US8022442 Semiconductor device having STI with nitride liner and UV light shielding film
09/20/2011US8022403 Semiconductor apparatus including photodiode unit and method of inspection of the same
09/20/2011US8022402 Active device array substrate
09/20/2011US8022151 Adamantane derivative, method for producing the same, resin composition containing the adamantane derivative and use thereof
09/20/2011US8021976 Method of wire bonding over active area of a semiconductor circuit
09/20/2011US8021925 Thermal paste containment for semiconductor modules
09/20/2011US8021924 Encapsulant cavity integrated circuit package system and method of fabrication thereof
09/20/2011US8021921 Method of joining chips utilizing copper pillar
09/20/2011US8021920 Method for producing a metal-ceramic substrate for electric circuits on modules
09/20/2011US8021918 Integrated circuit chips with fine-line metal and over-passivation metal
09/20/2011US8021897 Methods of fabricating a cross point memory array
09/20/2011CA2325799C Heat sink and method of fabricating same
09/15/2011WO2011112818A1 Processing to reduce wafer level warpage on moulding
09/15/2011WO2011112728A2 Package having spaced apart heat sink
09/15/2011WO2011111989A2 Metal-bonded ceramic substrate
09/15/2011WO2011111716A1 Heat insulation/heat dissipation sheet and intra-device structure
09/15/2011WO2011111673A1 Curable composition, hardened material, and method for using curable composition
09/15/2011WO2011111667A1 Curable composition, hardened material, and method for using curable composition
09/15/2011WO2011111593A1 Magnetic device
09/15/2011WO2011111541A1 Mems sensor
09/15/2011WO2011111524A1 Substrate wiring method and semiconductor manufacturing device
09/15/2011WO2011111361A1 Nonvolatile memory element and method for manufacturing same
09/15/2011WO2011111328A1 Semiconductor laser apparatus
09/15/2011WO2011111318A1 Module
09/15/2011WO2011111308A1 Process for production of semiconductor device, and semiconductor device
09/15/2011WO2011111300A1 Semiconductor package having electrode on side surface, and semiconductor device
09/15/2011WO2011111295A1 Electronic apparatus
09/15/2011WO2011111133A1 Semiconductor apparatus and manufacturing method of the same
09/15/2011WO2011111126A1 Semiconductor device and method for manufacturing same
09/15/2011WO2011111112A1 Heat dissipating structure and production method therefor
09/15/2011WO2011110900A1 Stack of molded integrated circuit dies with side surface contact tracks
09/15/2011WO2011110781A1 Electronic device having a chip and method for manufacturing by coils
09/15/2011WO2011110390A1 Liquid dimm cooling device
09/15/2011WO2011082778A3 Method for producing a component that is embedded in an insulating material and comprises bumps and conductor tracks that overlap said bumps and corresponding device
09/15/2011WO2011056668A3 Selective die electrical insulation additive process
09/15/2011WO2010125639A9 Power semiconductor device
09/15/2011US20110223755 Method for removing oxides
09/15/2011US20110223420 Adhesive composition and sheet for forming semiconductor wafer-protective film
09/15/2011US20110222328 Distributed semiconductor device methods, apparatus, and systems
09/15/2011US20110221466 Semiconductor device and method of testing semiconductor device
09/15/2011US20110221077 Water repellant composition for substrate to be exposed, method for forming resist pattern, electronic device produced by the formation method, treatment method for imparting water repellency to substrate to be exposed, water repellant set for substrate to be exposed, and treatment method for imparting water repellency to substrate to be exposed using the same
09/15/2011US20110221076 Semiconductor device
09/15/2011US20110221075 Method of manufacturing electronic device and electronic device
09/15/2011US20110221074 Board on chip package
09/15/2011US20110221073 Layered chip package with wiring on the side surfaces
09/15/2011US20110221072 Integrated circuit packaging system with via and method of manufacture thereof
09/15/2011US20110221071 Electronic device and manufacturing method of electronic device
09/15/2011US20110221070 Chip package and method for forming the same
09/15/2011US20110221069 Semiconductor device and method of manufacturing the same
09/15/2011US20110221068 Interconnect structure comprising blind vias intended to be metalized
09/15/2011US20110221067 Semiconductor integrated circuit device
09/15/2011US20110221066 Method for manufacturing a semiconductor device and a semiconductor device
09/15/2011US20110221065 Methods of forming semiconductor chip underfill anchors
09/15/2011US20110221064 Electromigration resistant aluminum-based metal interconnect structure
09/15/2011US20110221063 Manufacturing Method of Semiconductor Device
09/15/2011US20110221062 Methods for fabrication of an air gap-containing interconnect structure
09/15/2011US20110221061 Anode for an organic electronic device
09/15/2011US20110221060 Process for Fabricating Electronic Components Using Liquid Injection Molding
09/15/2011US20110221059 Quad flat non-leaded semiconductor package and method of fabricating the same
09/15/2011US20110221058 Semiconductor device and method of forming vertically offset bond on trace interconnects on different height traces
09/15/2011US20110221057 Semiconductor Device and Method of Forming Sacrificial Protective Layer to Protect Semiconductor Die Edge During Singulation
09/15/2011US20110221056 Electrode structure and microdevice package provided therewith
09/15/2011US20110221055 Semiconductor Device and Method of Forming Repassivation Layer with Reduced Opening to Contact Pad of Semiconductor Die
09/15/2011US20110221054 Semiconductor Device and Method of Forming Conductive Vias Through Interconnect Structures and Encapsulant of WLCSP
09/15/2011US20110221053 Pre-processing to reduce wafer level warpage
09/15/2011US20110221052 Lead frame for semiconductor device and method of manufacturing of the same
09/15/2011US20110221051 Leadframe based multi terminal ic package
09/15/2011US20110221050 Electronic device, relay member, and mounting substrate, and method for manufacturing the electronic device
09/15/2011US20110221049 Quad flat non-leaded semiconductor package and method for fabricating the same
09/15/2011US20110221048 Package Having Spaced Apart Heat Sink
09/15/2011US20110221047 Flip chip package structure with heat dissipation enhancement and its application
09/15/2011US20110221046 Semiconductor assembly package having shielding layer and method therefor
09/15/2011US20110221044 Tungsten barrier and seed for copper filled tsv
09/15/2011US20110221043 Semiconductor device and manufacturing method therefor
09/15/2011US20110221042 Semiconductor device and method of fabricating same
09/15/2011US20110221041 Semiconductor Device and Method of Forming Insulating Layer Around Semiconductor Die
09/15/2011US20110221021 Solid state image pickup device and method of producing solid state image pickup device
09/15/2011US20110221013 Microelectromechanical device including an encapsulation layer of which a portion is removed to expose a substantially planar surface having a portion that is disposed outside and above a chamber and including a field region on which integrated circuits are formed, and methods for fabricating same
09/15/2011US20110221010 Semiconductor device having improved reliability
09/15/2011US20110221008 Semiconductor Packaging and Fabrication Method Using Connecting Plate for Internal Connection
09/15/2011US20110221005 Integrated circuit package for semiconductior devices with improved electric resistance and inductance
09/15/2011US20110220999 Semiconductor device and a method of manufacturing the same
09/15/2011US20110220968 Device
09/15/2011US20110220728 Protective film for electronic component, method for manufacturing the same, and use thereof
09/15/2011US20110220596 Support system for solar panels
09/15/2011US20110220406 Electrode portion structure
09/15/2011US20110220330 Capacitive device and method for the electrostatic transport of dielectric and ferroelectric fuilds