Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
03/2012
03/06/2012US8129265 High performance system-on-chip discrete components using post passivation process
03/06/2012US8129263 Wire bond interconnection and method of manufacture thereof
03/06/2012US8129260 Semiconductor substrates having low defects and methods of manufacturing the same
03/06/2012US8129245 Methods of manufacturing power semiconductor devices with shield and gate contacts
03/06/2012US8129223 Nanotube modified solder thermal intermediate structure, systems, and methods
03/06/2012US8129222 High density chip scale leadframe package and method of manufacturing the package
03/06/2012CA1341628C Devices and systems comprising ba-cuprate superconductor
03/05/2012DE202012000325U1 LED-Modul mit verbesserter Kühlung LED module with improved cooling
03/02/2012DE202011105514U1 Interposer-Bauelement Interposer component
03/01/2012WO2012027458A1 Structures and methods for testing printable integrated circuits
03/01/2012WO2012027424A1 A hybrid multilayer substrate
03/01/2012WO2012027423A2 Wide input output memory with low density, low latency and high density, high latency blocks
03/01/2012WO2012027075A2 Bumpless build-up layer package with a pre-stacked microelectronic devices
03/01/2012WO2012026516A1 Element-containing package and module provided therewith
03/01/2012WO2012026418A1 Semiconductor device
03/01/2012WO2012026217A1 Cooling device
03/01/2012WO2012026074A1 Image pickup device, image pickup module, and camera
03/01/2012WO2012026057A1 Semiconductor chip having heater wiring
03/01/2012WO2012025981A1 Cooling apparatus, electronic apparatus having cooling apparatus, and method for cooling heat generating body
03/01/2012WO2012025448A1 Electrical circuit having circuit components to be cooled, heat sink, and method for sealingly embedding an electrical circuit
03/01/2012WO2012025294A1 Method for producing an electrical circuit and electrical circuit
03/01/2012WO2012025025A1 Heat dissipation structure for soi field effect transistor
03/01/2012WO2012024918A1 Semiconductor sturcture and manufacturing method thereof
03/01/2012WO2012024887A1 Water-cooling radiator for thyristor
03/01/2012WO2012006167A3 Method and system for thin multi chip stack package with film on wire and copper wire
03/01/2012WO2012004137A3 Method to form solder deposits on substrates
03/01/2012WO2012004136A3 Method to form solder alloy deposits on substrates
03/01/2012WO2011162487A3 Cooling device for a heat-emitting element
03/01/2012WO2011142582A3 Stacked semiconductor package
03/01/2012WO2011142581A3 Stacked semiconductor package
03/01/2012WO2011140552A3 Method for attaching wide bus memory and serial memory to a processor within a chip scale package footprint
03/01/2012WO2011130717A3 Forming functionalized carrier structures with coreless packages
03/01/2012US20120052926 Variable Capacitance Integrated Electronic Circuit Module
03/01/2012US20120051392 Applying Thermal Mechanical Characteristics of Complex Semiconductor Devices by Integrated Heating Systems
03/01/2012US20120050996 Semiconductor package with thermal heat spreader
03/01/2012US20120049390 Electrical component and method of manufacturing the same
03/01/2012US20120049389 Bond pad for semiconductor die
03/01/2012US20120049388 Semiconductor Device and Method of Forming Adhesive Material Over Semiconductor Die and Carrier to Reduce Die Shifting During Encapsulation
03/01/2012US20120049387 Semiconductor device and method of fabricating the same
03/01/2012US20120049386 Semiconductor package
03/01/2012US20120049385 Wafer level chip scale package having an enhanced heat exchange efficiency with an emf shield and a method for fabricating the same
03/01/2012US20120049384 Buffer Layer to Enhance Photo and/or Laser Sintering
03/01/2012US20120049383 Re-Establishing Surface Characteristics of Sensitive Low-K Dielectrics in Microstructure Devices by Using an In Situ Surface Modification
03/01/2012US20120049382 Bumpless build-up layer package with pre-stacked microelectronic devices
03/01/2012US20120049381 Semiconductor device and method for manufacturing the same
03/01/2012US20120049379 Substrate Dicing Technique for Separating Semiconductor Dies with Reduced Area Consumption
03/01/2012US20120049378 Semiconductor storage device and a method of manufacturing the semiconductor storage device
03/01/2012US20120049377 Semiconductor device and method of double photolithography process for forming patterns of the semiconductor device
03/01/2012US20120049376 Manufacturing fixture for a ramp-stack chip package
03/01/2012US20120049375 Method and system for routing electrical connections of semiconductor chips
03/01/2012US20120049374 Method and apparatus for memory cell layout
03/01/2012US20120049373 Integrated Circuit Including Interconnect Levels
03/01/2012US20120049371 Interconnect Structure for Semiconductor Devices
03/01/2012US20120049370 Carbon nanotube interconnection and manufacturing method thereof
03/01/2012US20120049369 Semiconductor device and method of manufacturing the same
03/01/2012US20120049368 Semiconductor package
03/01/2012US20120049367 Semiconductor device and manufacturing method of semiconductor device
03/01/2012US20120049366 Package structure having through-silicon-via (tsv) chip embedded therein and fabrication method thereof
03/01/2012US20120049365 Semiconductor package
03/01/2012US20120049364 Emebedded structures and methods of manufacture thereof
03/01/2012US20120049363 Package structure
03/01/2012US20120049362 Semiconductor device and method for manufacturing thereof
03/01/2012US20120049361 Semiconductor integrated circuit
03/01/2012US20120049360 Semiconductor Package And Method For Making The Same
03/01/2012US20120049359 Ball grid array package
03/01/2012US20120049358 Semiconductor Device and Semiconductor Process for Making the Same
03/01/2012US20120049357 Semiconductor Device and Method of Forming a Metallurgical Interconnection Between a Chip and a Substrate in a Flip Chip Package
03/01/2012US20120049356 Semiconductor device and manufacturing method of semiconductor device
03/01/2012US20120049355 Semiconductor apparatus
03/01/2012US20120049354 Semiconductor device and method of forming the same
03/01/2012US20120049353 Low-cost 3d face-to-face out assembly
03/01/2012US20120049352 Multi-chip package and method of manufacturing the same
03/01/2012US20120049351 Package substrate and flip chip package including the same
03/01/2012US20120049350 Stress Reduction in Chip Packaging by Using a Low-Temperature Chip-Package Connection Regime
03/01/2012US20120049349 Semiconductor chips and methods of forming the same
03/01/2012US20120049348 Package having elastic members for vias, package on package comprising the same, and methods of fabricating the same
03/01/2012US20120049347 Semiconductor structure having conductive vias and method for manufacturing the same
03/01/2012US20120049346 Pillar Bumps and Process for Making Same
03/01/2012US20120049345 Substrate vias for heat removal from semiconductor die
03/01/2012US20120049344 Semiconductor Device and Method of Forming FO-WLCSP with Discrete Semiconductor Components Mounted Under and Over Semiconductor Die
03/01/2012US20120049343 Conductive connection structure with stress reduction arrangement for a semiconductor device, and related fabrication method
03/01/2012US20120049342 Semiconductor die terminal
03/01/2012US20120049341 Semiconductor Package Structures Having Liquid Cooler Integrated with First Level Chip Package Modules
03/01/2012US20120049340 Manufacturing Method of Semiconductor Device
03/01/2012US20120049339 Semiconductor package structure and manufacturing process thereof
03/01/2012US20120049338 Stackable semiconductor device packages
03/01/2012US20120049337 Semiconductor device
03/01/2012US20120049336 Semiconductor package for forming a leadframe package
03/01/2012US20120049335 Singulation method for semiconductor package with plating on side of connectors
03/01/2012US20120049334 Semiconductor Device and Method of Forming Leadframe as Vertical Interconnect Structure Between Stacked Semiconductor Die
03/01/2012US20120049333 Hybrid Multilayer Substrate
03/01/2012US20120049332 Semiconductor package and method for manufacturing the same
03/01/2012US20120049331 Semiconductor device, method for manufacturing same, and semiconductor apparatus
03/01/2012US20120049321 Programmable electrical fuse
03/01/2012US20120049200 Systems and methods for preparing freestanding films using laser-assisted chemical etch, and freestanding films formed using same
03/01/2012US20120049186 Semiconductor structures
03/01/2012US20120047827 Standing seam roof clamp
03/01/2012DE19758977B4 Verfahren zur Herstellung eines Halbleiterbauelements A process for producing a semiconductor device
03/01/2012DE10234178B4 Verfahren zur Herstellung eines OLED-Bauelements mit einem verstärkten Substrat A process for preparing an OLED device with a reinforced substrate
03/01/2012DE102011079807A1 Halbleitervorrichtung Semiconductor device
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