Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
11/2014
11/25/2014US8896092 Anti-fuse element
11/25/2014US8896091 Apparatus and methods for reducing impact of high RF loss plating
11/25/2014US8896090 Electrical fuses and methods of making electrical fuses
11/25/2014US8896089 Interposers for semiconductor devices and methods of manufacture thereof
11/25/2014US8896088 Reliable electrical fuse with localized programming
11/25/2014US8896086 System for preventing tampering with integrated circuit
11/25/2014US8896068 Semiconductor device including source/drain regions and a gate electrode, and having contact portions
11/25/2014US8896031 Organic light emitting display device and method for manufacturing the same
11/25/2014US8896023 Silicon devices/heatsinks stack assembly and a method to pull apart a faulty silicon device in said stack assembly
11/25/2014US8896010 Wafer-level flip chip device packages and related methods
11/25/2014US8895982 Organic light-emitting display apparatus and method of manufacturing the same
11/25/2014US8895981 Multichip module with reroutable inter-die communication
11/25/2014US8895874 Indium-less transparent metalized layers
11/25/2014US8895664 Curable composition
11/25/2014US8895662 Curable composition and method for manufacturing the same
11/25/2014US8895442 Cobalt titanium oxide dielectric films
11/25/2014US8895440 Semiconductor die and method of forming Fo-WLCSP vertical interconnect using TSV and TMV
11/25/2014US8895436 Implementing enhanced power supply distribution and decoupling utilizing TSV exclusion zone
11/25/2014US8895435 Polysilicon layer and method of forming the same
11/25/2014US8895433 Method of forming a graphene cap for copper interconnect structures
11/25/2014US8895432 Method of fabricating a self-aligned buried bit line for a vertical channel DRAM
11/25/2014US8895430 Method of making a semiconductor device comprising a land grid array flip chip bump system with short bumps
11/25/2014US8895421 III-N device structures and methods
11/25/2014US8895411 Method for creating semiconductor junctions with reduced contact resistance
11/25/2014US8895409 Semiconductor wafer plating bus and method for forming
11/25/2014US8895404 Method of back-side patterning
11/25/2014US8895385 Methods of forming semiconductor structures
11/25/2014US8895380 Method of making semiconductor assembly with built-in stiffener and semiconductor assembly manufactured thereby
11/25/2014US8895368 Method for manufacturing chip package structure
11/25/2014US8895367 Fabrication method of semiconductor package
11/25/2014US8895366 Fabrication method of semiconductor package
11/25/2014US8895363 Die preparation for wafer-level chip scale package (WLCSP)
11/25/2014US8895362 Methods for bonding material layers to one another and resultant apparatus
11/25/2014US8895360 Integrated semiconductor device and wafer level method of fabricating the same
11/25/2014US8895359 Semiconductor device, flip-chip mounting method and flip-chip mounting apparatus
11/25/2014US8895358 Semiconductor device and method of forming cavity in PCB containing encapsulant or dummy die having CTE similar to CTE of large array WLCSP
11/25/2014US8895357 Integrated circuit and method of manufacturing the same
11/25/2014US8893953 Wire bonding method in circuit device
11/25/2014US8893770 Heat sink assembly for electronic components
11/25/2014US8893769 Heat sink wind guide structure and thermal module thereof
11/25/2014US8893380 Method of manufacturing a chip embedded printed circuit board
11/25/2014US8893379 Manufacturing method of package structure
11/25/2014US8893377 Apparatus and method for mounting semiconductor light-emitting element
11/20/2014US20140342683 Wireless communication system
11/20/2014US20140342552 Method of forming a through-silicon via utilizing a metal contact pad in a back-end-of-line wiring level to fill the through-silicon via
11/20/2014US20140342546 Copper pillar bump with cobalt-containing sidewall protection layer
11/20/2014US20140342545 Techniques for Fabricating Fine-Pitch Micro-Bumps
11/20/2014US20140342526 Method for manufacturing semiconductor substrate
11/20/2014US20140342507 Fabrication method of semiconductor package
11/20/2014US20140342504 Electronic device, method of manufacturing, and electronic device manufacturing apparatus
11/20/2014US20140342503 Compliant interconnects in wafers
11/20/2014US20140342501 Package stacks and methods of manufacturing the same
11/20/2014US20140342500 Method and system for template assisted wafer bonding
11/20/2014US20140342487 Process for encapsulating a microelectronic device comprising injection of noble gas through a material permeable to this noble gas
11/20/2014US20140342476 Land grid array semiconductor device packages
11/20/2014US20140340849 Semiconductor package having heat spreader and method of forming the same
11/20/2014US20140340138 Low voltage metal gate antifuse with depletion mode mosfet
11/20/2014US20140339714 Semiconductor device
11/20/2014US20140339713 Semiconductor device manufacturing method and semiconductor device
11/20/2014US20140339712 Semiconductor device comprising mold for top side and sidewall protection
11/20/2014US20140339711 Semiconductor device, method of positioning semiconductor device, and positioning apparatus for semiconductor device
11/20/2014US20140339710 Method for bonding wafers and structure of bonding part
11/20/2014US20140339709 High power dielectric carrier with accurate die attach layer
11/20/2014US20140339708 Semiconductor package device
11/20/2014US20140339707 Thermal Dissipation Through Seal Rings in 3DIC Structure
11/20/2014US20140339706 Integrated circuit package with an interposer formed from a reusable carrier substrate
11/20/2014US20140339705 Iintegrated circuit package using silicon-on-oxide interposer substrate with through-silicon vias
11/20/2014US20140339704 Semiconductor package
11/20/2014US20140339703 Structure and method for making crack stop for 3d integrated circuits
11/20/2014US20140339702 Metal pvd-free conducting structures
11/20/2014US20140339701 Method of forming metal interconnections of semiconductor device
11/20/2014US20140339700 Graphene-based metal diffusion barrier
11/20/2014US20140339699 Under ball metallurgy (ubm) for improved electromigration
11/20/2014US20140339698 Semiconductor device with through-substrate via covered by a solder ball and related method of production
11/20/2014US20140339697 Solder Bump for Ball Grid Array
11/20/2014US20140339696 Interconnect Structure for Wafer Level Package
11/20/2014US20140339695 Electronic component and method of fabricating the same
11/20/2014US20140339694 Semiconductor Devices Having a Glass Substrate, and Method for Manufacturing Thereof
11/20/2014US20140339693 Semiconductor module
11/20/2014US20140339692 Semiconductor package stack having a heat slug
11/20/2014US20140339691 Semiconductor device having a plurality of circuits arranged on a side of a semiconductor chip
11/20/2014US20140339690 Elimination of Die-Top Delamination
11/20/2014US20140339689 High frequency switch module
11/20/2014US20140339687 Power plane for multi-layered substrate
11/20/2014US20140339685 Glass composition for protecting semiconductor junction, method of manufacturing semiconductor device and semiconductor device
11/20/2014US20140339684 Synthetic diamond coated compound semiconductor substrates
11/20/2014US20140339683 Semiconductor Device and Method of Forming Insulating Layer Around Semiconductor Die
11/20/2014US20140339682 Semiconductor device and method for manufacturing semiconductor device
11/20/2014US20140339681 Method for fabricating a composite structure to be separated by exfoliation
11/20/2014US20140339676 Semiconductor device and method of forming the same
11/20/2014US20140339675 Polysilicon fuse, manufacturing method thereof, and semiconductor device including polysilicon fuse
11/20/2014US20140339674 Semiconductor device
11/20/2014US20140339672 Wafer die separation
11/20/2014US20140339668 Imaging unit and imaging apparatus
11/20/2014US20140339618 Circuit having capacitor coupled with memory element
11/20/2014US20140339568 Semiconductor device with substrate via hole and method to form the same
11/20/2014US20140339558 Alternating open-ended via chains for testing via formation and dielectric integrity
11/20/2014US20140339547 Semiconductor device and method for manufacturing the same
11/20/2014US20140339290 Wire bonding method and semiconductor package manufactured using the same
11/20/2014US20140338956 Semiconductor device package and method of manufacture
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