Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
05/2012
05/30/2012CN101115372B Heat exchanger
05/30/2012CN101114657B Display panel, mask and method of manufacturing the same
05/30/2012CN101090944B Epoxy resin composition for semiconductor encapsulation and semiconductor device
05/30/2012CN101009308B Light-emitting device and electronic apparatus
05/30/2012CN101000907B Semiconductor device, manufacturing method of semiconductor device
05/29/2012US8189344 Integrated circuit package system for stackable devices
05/29/2012US8188763 Nonvolatile nanotube programmable logic devices and a nonvolatile nanotube field programmable gate array using same
05/29/2012US8188607 Layout structure for chip coupling
05/29/2012US8188606 Solder bump interconnect
05/29/2012US8188605 Components joining method and components joining structure
05/29/2012US8188604 Semiconductor device incorporating preventative measures to reduce cracking in exposed electrode layer
05/29/2012US8188603 Post passivation interconnection schemes on top of IC chip
05/29/2012US8188602 Semiconductor device having multilevel copper wiring layers and its manufacture method
05/29/2012US8188600 Semiconductor device and method of fabricating the same
05/29/2012US8188599 Semiconductor device, its manufacturing method, and sputtering target material for use in the method
05/29/2012US8188598 Bump-on-lead flip chip interconnection
05/29/2012US8188597 Fixture to constrain laminate and method of assembly
05/29/2012US8188596 Multi-chip module
05/29/2012US8188595 Two-phase cooling for light-emitting devices
05/29/2012US8188594 Input/output package architectures
05/29/2012US8188593 Silicon substrate having through vias and package having the same
05/29/2012US8188591 Integrated structures of high performance active devices and passive devices
05/29/2012US8188590 Integrated circuit package system with post-passivation interconnection and integration
05/29/2012US8188589 Substrate with pin, manufacturing method thereof, and semiconductor product
05/29/2012US8188588 Manufacturing method of substrate for a semiconductor package, manufacturing method of semiconductor package, substrate for a semiconductor package and semiconductor package
05/29/2012US8188587 Semiconductor die package including lead with end portion
05/29/2012US8188586 Mountable integrated circuit package system with mounting interconnects
05/29/2012US8188585 Electronic device and method for producing a device
05/29/2012US8188584 Direct-write wafer level chip scale package
05/29/2012US8188583 Semiconductor device and method of manufacturing same
05/29/2012US8188582 Lead frame, semiconductor device using the lead frame, and methods of manufacturing the same
05/29/2012US8188581 Mechanical coupling in a multi-chip module using magnetic components
05/29/2012US8188580 Semiconductor device, semiconductor element, and substrate
05/29/2012US8188579 Semiconductor device including leadframe having power bars and increased I/O
05/29/2012US8188578 Seal ring structure for integrated circuits
05/29/2012US8188577 Production method of semiconductor device, semiconductor device, and exposure apparatus
05/29/2012US8188576 Compound for filling small gaps in a semiconductor device, composition including the compound, and method of fabricating a semiconductor capacitor
05/29/2012US8188575 Apparatus and method for uniform metal plating
05/29/2012US8188569 Phase change random access memory device with transistor, and method for fabricating a memory device
05/29/2012US8188565 Semiconductor chip and shielding structure thereof
05/29/2012US8188545 Integrated circuit device and electronic instrument
05/29/2012US8188544 Integrated circuit device and electronic instrument
05/29/2012US8188517 Three-dimensional nonvolatile memory device and method for fabricating the same
05/29/2012US8188516 Creating integrated circuit capacitance from gate array structures
05/29/2012US8188469 Test device and a semiconductor integrated circuit device
05/29/2012US8188417 Light detecting device
05/29/2012US8187965 Wirebond pad for semiconductor chip or wafer
05/29/2012US8187921 Semiconductor package having ink-jet type dam and method of manufacturing the same
05/29/2012US8186045 Multilayer printed circuit board and multilayer printed circuit board manufacturing method
05/24/2012WO2012068198A1 Using bump bonding to distribute current flow on a semiconductor power device
05/24/2012WO2012067992A2 Conductive pads defined by embedded traces
05/24/2012WO2012067990A1 Microelectronic package with terminals on dielectric mass
05/24/2012WO2012067679A1 Multichip module for communications
05/24/2012WO2012067263A1 Laminate and method for producing laminate
05/24/2012WO2012067177A1 Wiring board and method for producing same
05/24/2012WO2012067153A1 Silicone resin composition; and usage method for silicone resin-containing structure using same, optical semiconductor element sealed body using same, and said silicone resin composition using same
05/24/2012WO2012067109A1 Connection terminal and circuit component
05/24/2012WO2012067094A1 Insulating substrate, metal-clad laminate, printed wiring board, and semiconductor device
05/24/2012WO2012067071A1 Polyfunctional epoxy compound
05/24/2012WO2012067044A1 Heat sink
05/24/2012WO2012067030A1 Electrode film, sputtering target, thin-film transistor, method for manufacturing thin-film transistor
05/24/2012WO2012067003A1 Circuit substrate and manufacturing method therefor
05/24/2012WO2012066998A1 Heat-curable silicone resin composition, silicone resin-containing structure, optical semiconductor element sealed body, and silanol condensation catalyst
05/24/2012WO2012066944A1 Connection terminal and circuit component
05/24/2012WO2012066833A1 Semiconductor device
05/24/2012WO2012066791A1 Semiconductor package
05/24/2012WO2012066703A1 Semiconductor device and method for manufacturing same
05/24/2012WO2012065229A1 Single-chip integrated circuit with capacitive isolation
05/24/2012WO2012021641A3 Stitch bump stacking design for overall package size reduction for multiple stack
05/24/2012WO2012010662A3 Process for direct bonding two elements comprising copper portions and dielectric materials
05/24/2012WO2011150879A3 Method for encapsulating component and structure thereof
05/24/2012US20120129988 Adhesive composition, adhesive sheet, circuit board and semiconductor device both produced using these, and processes for producing these
05/24/2012US20120127798 Method and apparatus for sharing internal power supplies in integrated circuit devices
05/24/2012US20120127774 Semiconductor device and electronic device
05/24/2012US20120127689 Integrated package circuit with stiffener
05/24/2012US20120126900 Semiconductor device
05/24/2012US20120126435 Curable composition for semiconductor encapsulation
05/24/2012US20120126432 Semiconductor device having power supply-side and ground-side metal reinforcing members insulated from each other
05/24/2012US20120126431 Semiconductor package
05/24/2012US20120126430 Apparatus and Methods for 3-D Stacking of Thinned Die
05/24/2012US20120126428 Integrated circuit packaging system with stack interconnect and method of manufacture thereof
05/24/2012US20120126427 Memory device, laminated semiconductor substrate and method of manufacturing the same
05/24/2012US20120126426 Semiconductor memory device and method of forming the same
05/24/2012US20120126425 3d integrated circuits structure
05/24/2012US20120126424 Semiconductor chip including a chip via plug penetrating a substrate, a semiconductor stack, a semiconductor device package and an electronic apparatus including the semiconductor chip
05/24/2012US20120126423 Semiconductor device manufacturing method and semiconductor device
05/24/2012US20120126422 Semiconductor device having plural wiring layers
05/24/2012US20120126421 Semiconductor Devices and Methods of Forming the Same
05/24/2012US20120126420 Semiconductor device having conductive vias and semiconductor package having semiconductor device
05/24/2012US20120126419 Substrate Arrangement and a Method of Manufacturing a Substrate Arrangement
05/24/2012US20120126418 Integrated circuit device having die bonded to the polymer side of a polymer substrate
05/24/2012US20120126417 Semiconductor Device And Semiconductor Package Having The Same
05/24/2012US20120126416 Semiconductor Device and Method of Forming Partially-Etched Conductive Layer Recessed Within Substrate for Bonding to Semiconductor Die
05/24/2012US20120126415 Filling Cavities in Semiconductor Structures
05/24/2012US20120126414 Semiconductor Device and Manufacturing Method Thereof
05/24/2012US20120126413 Method of sealing an air gap in a layer of a semiconductor structure and semiconductor structure
05/24/2012US20120126412 Integrated circuit device and method of forming the same
05/24/2012US20120126411 Semiconductor device and manufacturing method thereof
05/24/2012US20120126410 Contact Array for Substrate Contacting
05/24/2012US20120126409 Seed layers for metallic interconnects and products