Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
06/2012
06/19/2012US8202566 Method of producing an electronic unit having a polydimethylsiloxane substrate and circuit lines
06/19/2012CA2503826C Power management for spatial power combiners
06/14/2012WO2012079042A1 Heatsink device and method
06/14/2012WO2012079013A1 High density three-dimensional integrated capacitors
06/14/2012WO2012078876A1 Interconnect structure
06/14/2012WO2012078645A1 Methods of modifying metal-oxide nanoparticles
06/14/2012WO2012078617A1 Siloxane compositions including titanium dioxide nanoparticles suitable for forming encapsulants
06/14/2012WO2012078594A1 Siloxane compositions suitable for forming encapsulants
06/14/2012WO2012078582A1 Siloxane compositions including metal-oxide nanoparticles suitable for forming encapsulants
06/14/2012WO2012078377A1 Bumpless build-up layer and laminated core hybrid structures and methods of assembling same
06/14/2012WO2012078335A2 Hybrid-core through holes and vias
06/14/2012WO2012078263A1 Power distribution network
06/14/2012WO2012078213A1 High density three-dimensional integrated capacitors
06/14/2012WO2012077522A1 Circuit module
06/14/2012WO2012077377A1 Resin composition
06/14/2012WO2012077330A1 Semiconductor device, method for manufacturing same, solid-state imaging device, method for manufacturing same, and electronic information device
06/14/2012WO2012077305A1 Conducting path, semiconductor device using conducting path, and method for producing conducting path and semiconductor device
06/14/2012WO2012076407A1 Electronic device with shunt for current measurement
06/14/2012WO2012076262A1 Adhesive compound and method for encapsulating an electronic arrangement
06/14/2012WO2012076259A1 Semiconductor component having increased stability relative to thermomechanical influences, and method for contacting a semiconductor
06/14/2012WO2012054711A3 Power/ground layout for chips
06/14/2012WO2012044733A3 Non-contact determination of joint integrity between a tsv die and a package substrate
06/14/2012WO2012040215A3 Stacked die assemblies including tsv die
06/14/2012US20120149249 Socket and semiconductor device provided with socket
06/14/2012US20120149168 Process for Producing a Multifunctional Dielectric Layer on a Substrate
06/14/2012US20120148852 Silane coating compositions, coating systems, and methods
06/14/2012US20120148187 Integrated circuit package connected to a data transmission medium
06/14/2012US20120147717 Method of burn-in testing for thermally assisted head
06/14/2012US20120147519 Electrode in semiconductor device, capacitor and method of fabricating the same
06/14/2012US20120146707 Semiconductor device and method of manufacturing the same
06/14/2012US20120146682 Yield enhancement for stacked chips through rotationally-connecting-interposer
06/14/2012US20120146248 Resin Composition for Encapsulation and Semiconductor Unit Encapsulated with Resin
06/14/2012US20120146247 Pre-treatment of memory cards for binding glue and other curable fluids
06/14/2012US20120146246 Integrated circuit packaging system with dielectric support and method of manufacture thereof
06/14/2012US20120146245 Semiconductor device
06/14/2012US20120146244 Semiconductor device
06/14/2012US20120146243 Integrated circuit packaging system with interposer
06/14/2012US20120146242 Semiconductor device and method of fabricating the same
06/14/2012US20120146240 Semiconductor device
06/14/2012US20120146239 Packaged microelectronic devices recessed in support member cavities, and associated methods
06/14/2012US20120146238 Method for Packaging Semiconductor Dies Having Through-Silicon Vias
06/14/2012US20120146237 Semiconductor device and method for manufacturing the same
06/14/2012US20120146236 Semiconductor Device and Method of Forming Openings Through Insulating Layer Over Encapsulant for Enhanced Adhesion of Interconnect Structure
06/14/2012US20120146235 Integrated circuit packaging system with vertical interconnection and method of manufacture thereof
06/14/2012US20120146234 Semiconductor device package and method of manufacturing thereof
06/14/2012US20120146233 Semiconductor device and substrate
06/14/2012US20120146232 Electronic device and method of manufacturing electronic device
06/14/2012US20120146231 Semiconductor Device and Method of Manufacture Thereof
06/14/2012US20120146230 Integrated circuit packaging system with interconnects and method of manufacture thereof
06/14/2012US20120146229 Integrated circuit packaging system with vertical interconnection and method of manufacture thereof
06/14/2012US20120146228 Semiconductor device and a method of manufacturing the same and a mounting structure of a semiconductor device
06/14/2012US20120146227 Integrated circuit nanowires
06/14/2012US20120146226 Integrated circuit chip and fabrication method
06/14/2012US20120146225 Damascene structure
06/14/2012US20120146224 Semiconductor having interconnects with improved mechanical properties by insertion of nanoparticles
06/14/2012US20120146223 Mos device with memory function and manufacturing method thereof
06/14/2012US20120146222 Circuit Structures and Electronic Systems
06/14/2012US20120146221 Method for fabricating semiconductor device with side contact
06/14/2012US20120146220 Semiconductor integrated-circuit device and method of producing the same
06/14/2012US20120146219 Wafer-level interconnect for high mechanical reliability applications
06/14/2012US20120146218 Semiconductor package device with cavity structure and the packaging method thereof
06/14/2012US20120146217 Conductive pad structure, chip package structure and device substrate
06/14/2012US20120146216 Semiconductor package and fabrication method thereof
06/14/2012US20120146215 Bonding pad structure and integrated circuit comprising a plurality of bonding pad structures
06/14/2012US20120146214 Semiconductor device with vias and flip-chip
06/14/2012US20120146213 High performance low profile qfn/lga
06/14/2012US20120146212 Solder bump connections
06/14/2012US20120146209 Packaging substrate having through-holed interposer embedded therein and fabrication method thereof
06/14/2012US20120146208 Semiconductor module and manufacturing method thereof
06/14/2012US20120146206 Pin attachment
06/14/2012US20120146205 Multi-Chip Module (MCM) Power Quad Flat No-Lead (PQFN) Semiconductor Package Utilizing a Leadframe for Electrical Interconnections
06/14/2012US20120146204 Semiconductor devices and electrical parts manufacturing using metal coated wires
06/14/2012US20120146203 Integrated circuit packaging system with multiple row leads and method of manufacture thereof
06/14/2012US20120146202 Top exposed Package and Assembly Method
06/14/2012US20120146201 Die arrangement and method of forming a die arrangement
06/14/2012US20120146200 Pre-bonded substrate for integrated circuit package and method of making the same
06/14/2012US20120146199 Substrate for integrated circuit package with selective exposure of bonding compound and method of making thereof
06/14/2012US20120146198 Integrated circuits and fabrication process thereof
06/14/2012US20120146193 Thermal Conduction Paths for Semiconductor Structures
06/14/2012US20120146181 Semiconductor Device and Method of Forming an Inductor Within Interconnect Layer Vertically Separated from Semiconductor Die
06/14/2012US20120146180 Hybrid-core through holes and vias
06/14/2012US20120146179 Electrical fuse with a current shunt
06/14/2012US20120146178 Overmolded semiconductor package with wirebonds for electromagnetic shielding
06/14/2012US20120146177 Semiconductor Device and Method of Forming Recesses in Substrate for Same Size or Different Sized Die with Vertical Integration
06/14/2012US20120146176 Semiconductor device
06/14/2012US20120146151 Electrostatic discharge protection device
06/14/2012US20120146150 self-protected electrostatic discharge field effect transistor (spesdfet), an integrated circuit incorporating the spesdfet as an input/output (i/o) pad driver and associated methods of forming the spesdfet and the integrated circuit
06/14/2012US20120146143 Semiconductor device and method of fabricating the same
06/14/2012US20120146110 Semiconductor device and forming method of the same
06/14/2012US20120146099 Reconfigurable rf/digital hybrid 3d interconnect
06/14/2012US20120145848 Pier cap cleat
06/14/2012US20120145228 Photovoltaic Module Mounting System
06/14/2012US20120145227 Frame system for solar cell module
06/14/2012DE112010001453T5 Leiterplatte, Hochfrequenzmodul und Radarvorrichtung PCB, high-frequency module and radar apparatus
06/14/2012DE102011088285A1 Electronic device i.e. electronic control unit, for use in engine block of vehicle, has ceramic and resin substrates adhered and secured on side of housing by heat conducting and electrically insulating adhesive
06/14/2012DE102011085203A1 Halbleiterbauelemente mit Durchgangskontakten und zugehörige Herstellungsverfahren Semiconductor components with through contacts and associated manufacturing processes
06/14/2012DE102011056403A1 Die-Anordnung und Verfahren zum Bilden einer Die-Anordnung The arrangement and method for forming a die assembly
06/14/2012DE102011056315A1 Halbleiterbauelement und Verfahren zu dessen Herstellung Semiconductor device and process for its preparation
06/14/2012DE102011056213A1 Halbleitervorrichtung mit integriertem Schaltkreis A semiconductor device with an integrated circuit
06/14/2012DE102011056189A1 Method for manufacturing curved conductor for magnetic-current sensor, involves forming columnar portions with constant height and extending at right angles to contact portions and base portion
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