Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
02/2013
02/28/2013WO2013027669A1 Optical semiconductor device
02/28/2013WO2013027600A1 Friction stir welding structure and power semiconductor device
02/28/2013WO2013027409A1 Wiring board and high frequency module using same
02/28/2013WO2013027354A1 Bonded body, power semiconductor device and method for manufacturing bonded body and power semiconductor device
02/28/2013WO2013027274A1 Semiconductor device
02/28/2013WO2013026923A1 Sensor with a single electrical carrier means
02/28/2013WO2012154148A3 Heat transporting unit and electronic device
02/28/2013US20130050228 Glass as a substrate material and a final package for mems and ic devices
02/28/2013US20130050227 Glass as a substrate material and a final package for mems and ic devices
02/28/2013US20130049804 Method and apparatus for die testing on wafer
02/28/2013US20130049789 Die having wire bond alignment sensing structures
02/28/2013US20130049781 Semiconductor Devices with Self-heating Structures, Methods of Manufacture Thereof, and Testing Methods
02/28/2013US20130049746 Semiconductor Chip Package and Method
02/28/2013US20130049234 Substrate Dicing
02/28/2013US20130049232 Component assembly using a temporary attach material
02/28/2013US20130049231 Semiconductor device and method for making the same
02/28/2013US20130049230 Stacking method and stacking carrier
02/28/2013US20130049229 Semiconductor chip device with solder diffusion protection
02/28/2013US20130049226 Methods for forming interconnect structures
02/28/2013US20130049225 Stacked integrated circuit packages that include monolithic conductive vias
02/28/2013US20130049224 Packaging dram and soc in an ic package
02/28/2013US20130049223 Semiconductor device and semiconductor chip
02/28/2013US20130049222 Semiconductor device and method of manufacturing the same
02/28/2013US20130049221 Semiconductor package having plural semiconductor chips and method of forming the same
02/28/2013US20130049220 Through Silicon Via Keep Out Zone Formation Method and System
02/28/2013US20130049219 Semiconductor Device and Method for Forming the Same
02/28/2013US20130049218 Semiconductor device packaging having pre-encapsulation through via formation
02/28/2013US20130049217 Semiconductor device packaging having pre-encapsulation through via formation using drop-in signal conduits
02/28/2013US20130049216 Die-to-Die Gap Control for Semiconductor Structure and Method
02/28/2013US20130049215 Integrated circuit including front side and back side electrical interconnects
02/28/2013US20130049214 Method of processing at least one die and die arrangement
02/28/2013US20130049213 Configuration of connections in a 3d stack of integrated circuits
02/28/2013US20130049212 Semiconductor device
02/28/2013US20130049211 Semiconductor device and method of manufacturing the same
02/28/2013US20130049210 Semiconductor wafer and laminate structure including the same
02/28/2013US20130049209 Semiconductor device with damascene bit line and method for manufacturing the same
02/28/2013US20130049208 Integrated circuit packaging system with redistribution layer and method of manufacture thereof
02/28/2013US20130049207 Multiple step anneal method and semiconductor formed by multiple step anneal
02/28/2013US20130049206 Bond Pad Configurations for Controlling Semiconductor Chip Package Interactions
02/28/2013US20130049205 Semiconductor Device and Method of Manufacturing a Semiconductor Device Including Grinding Steps
02/28/2013US20130049204 Semiconductor device including diffusion soldered layer on sintered silver layer
02/28/2013US20130049203 Semiconductor Device with Buried Electrode
02/28/2013US20130049202 Laminated and sintered ceramic circuit board, and semiconductor package including the circuit board
02/28/2013US20130049201 Power Module and Manufacturing Method Thereof
02/28/2013US20130049199 Silicidation of device contacts using pre-amorphization implant of semiconductor substrate
02/28/2013US20130049198 Semiconductor package structure and manufacturing method thereof
02/28/2013US20130049197 Semiconductor package structure and manufacturing method thereof
02/28/2013US20130049196 Through interposer wire bond using low cte interposer with coarse slot apertures
02/28/2013US20130049195 Three-Dimensional Integrated Circuit (3DIC) Formation Process
02/28/2013US20130049194 Self-aligned protection layer for copper post structure
02/28/2013US20130049193 Formation of through-silicon via (tsv) in silicon substrate
02/28/2013US20130049192 Stacked chip package and fabrication method thereof
02/28/2013US20130049191 Semiconductor device and method of manufacturing the same
02/28/2013US20130049190 Methods of fabricating semiconductor chip solder structures
02/28/2013US20130049189 Semiconductor flip-chip system having three-dimensional solder joints
02/28/2013US20130049188 Semiconductor Device and Method of Forming TIM Within Recesses of MUF Material
02/28/2013US20130049187 Resin-diamagnetic material composite structure, method for producing the same, and semiconductor device using the same
02/28/2013US20130049186 Semiconductor device and method of manufacture thereof
02/28/2013US20130049185 Semiconductor package and fabrication method thereof
02/28/2013US20130049184 Electric device and production method therefor
02/28/2013US20130049183 Power device and method of packaging same
02/28/2013US20130049182 Semiconductor device packaging having pre-encapsulation through via formation using lead frames with attached signal conduits
02/28/2013US20130049181 Lead frame having a flag with in-plane and out-of-plane mold locking features
02/28/2013US20130049180 Qfn device and lead frame therefor
02/28/2013US20130049179 Low cost hybrid high density package
02/28/2013US20130049172 Insulating region for a semiconductor substrate
02/28/2013US20130049166 Semiconductor integrated circuit
02/28/2013US20130049165 Fuse
02/28/2013US20130049109 Metal Gate Structure
02/28/2013US20130049079 Small-Outline Package for a Power Transistor
02/28/2013US20130049077 High Performance Power Transistor Having Ultra-Thin Package
02/28/2013US20130049074 Methods for forming connections to a memory array and periphery
02/28/2013US20130049062 Light-Emitting Device
02/28/2013US20130048994 Low-resistance conductive line, thin film transistor, thin film transistor panel, and method for manufacturing the same
02/28/2013US20130048988 Nanopillar E-Fuse Structure and Process
02/28/2013US20130048983 Methods of forming structures with a focused ion beam for use in atomic force probing and structures for use in atomic force probing
02/28/2013US20130048982 Bond pad monitoring structure and related method of detecting significant alterations
02/28/2013US20130048981 Electrically measurable on-chip ic serial identifier and methods for producing the same
02/28/2013US20130048980 Integrated circuits with leakage current test structure
02/28/2013US20130048979 Test structure and method for determining overlay accuracy in semiconductor devices using resistance measurement
02/28/2013DE10236455B4 Halbleiterbauelement mit einem Leistungshalbleiterelement eines Vertikaltyps A semiconductor device comprising a power semiconductor element of a vertical type
02/28/2013DE102012215091A1 Sensor mit einem einzigen elektrischen Trägermittel Sensor with a single electrical carrier
02/28/2013DE102012214917A1 Halbleitervorrichtung und Verfahren zu deren Herstellung Semiconductor device and process for their preparation
02/28/2013DE102012214901A1 Halbleiteranordnung mit einer Diffusionslotschicht auf einer gesinterten Silberschicht A semiconductor device comprising a diffusion solder layer on a sintered layer of silver
02/28/2013DE102012214668A1 Hintergrund eines Strahlungsdosimeters auf einem Chip Background of Strahlungsdosimeters on a chip
02/28/2013DE102012108032A1 Halbleiterchippaket und Verfahren Semiconductor chip package and method
02/28/2013DE102012107969A1 Verfahren zum Bearbeiten eines Dies und eine Die-Anordnung This method of processing a and the arrangement
02/28/2013DE102012107924A1 Halbleiterbauelement mit einer amorphen halb-isolierenden Schicht, Temperatursensor und Verfahren zur Herstellung eines Halbleiterbauelements A semiconductor device with an amorphous semi-insulating layer, temperature sensor and method for manufacturing a semiconductor device
02/28/2013DE102012107803A1 Radareinheit für Millimeterwellen Radar unit for millimeter wave
02/28/2013DE102012107696A1 Halbleitergerät und Verfahren zum Herstellen eines Halbleitergerätes einschließlich Schleifschritte Semiconductor device and method of manufacturing a semiconductor device including grinding steps
02/28/2013DE102012100796A1 Chip-Zu-Chip-Abstandskontrolle für eine Halbleiterstruktur und Verfahren zu deren Herstellung Chip-to-chip spacing control for a semiconductor structure and process for their preparation
02/28/2013DE102012015841A1 System udn Verfahren zum thermischen Schützen eines Transistors in einem elektrisch angetriebenen Fahrzeug System UDN method for thermally protecting a transistor in an electrically powered vehicle
02/28/2013DE102011110799A1 Substrat für den Aufbau elektronischer Elemente Substrate for the development of electronic elements
02/28/2013DE102011081687A1 Halbleiterbauelement mit einem Kühlkörper A semiconductor device with a heat sink
02/28/2013DE102006038875B4 Herstellungsverfahre für ein elektronisches Bauelement und elektronisches Bauelement Production PROCEEDI for an electronic device and electronic device
02/27/2013EP2562810A1 Small-outline package for a power transistor
02/27/2013EP2562809A2 High performance liquid cooled heatsink for igbt modules
02/27/2013EP2562808A1 Cooled electrical assembly
02/27/2013EP2562807A1 Heat transfer in an electronic device
02/27/2013EP2562806A1 Glass substrate for forming semiconductor device via