Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
03/2013
03/21/2013WO2013037102A1 Encapsulation method for embedding chip into substrate and structure thereof
03/21/2013WO2013037056A1 In-grid on-device decoupling for bga
03/21/2013WO2013036988A1 Biocompatible electrode component and method for fabrication thereof
03/21/2013WO2013016264A3 Semiconductor die assemblies, semiconductor devices including same, and methods of fabrication
03/21/2013WO2013015591A3 Curable composition
03/21/2013WO2013006814A3 Solder desposition system and method for metal bumps
03/21/2013WO2013003651A3 In situ-built pin-grid arrays for coreless substrates, and methods of making same
03/21/2013WO2012148869A9 Contact metal for hybridization and related methods
03/21/2013US20130071998 Electrical Fuse With Metal Line Migration
03/21/2013US20130070438 Integrated circuit packaging system with interposer and method of manufacture thereof
03/21/2013US20130069252 Semiconductor Device and Method of Forming Semiconductor Die with Active Region Responsive to External Stimulus
03/21/2013US20130069251 Wiring substrate, method of manufacturing the same, and semiconductor device
03/21/2013US20130069250 Die substrate with reinforcement structure
03/21/2013US20130069249 Semiconductor device
03/21/2013US20130069248 Bonding method for three-dimensional integrated circuit and three-dimensional integrated circuit thereof
03/21/2013US20130069247 Apparatus for stacked electronic circuitry and associated methods
03/21/2013US20130069246 Methods of forming electronic devices
03/21/2013US20130069245 Semiconductor package and method for manufacturing the semiconductor package
03/21/2013US20130069244 Rectangular via for ensuring via yield in the absence of via redundancy
03/21/2013US20130069243 Chip Module and Method for Fabricating a Chip Module
03/21/2013US20130069242 Arrangement of through-substrate vias for stress relief and improved density
03/21/2013US20130069241 Semiconductor Device and Method of Forming Semiconductor Package Using Panel Form Carrier
03/21/2013US20130069240 Integrated circuit packaging system with dual side mold and method of manufacture thereof
03/21/2013US20130069239 Semiconductor Device and Method of Forming Stacked Semiconductor Die and Conductive Interconnect Structure Through an Encapsulant
03/21/2013US20130069238 Semiconductor device and a method for manufacturing a semiconductor device
03/21/2013US20130069237 Platinum-containing constructions, and methods of forming platinum-containing constructions
03/21/2013US20130069236 Efficient semiconductor device cell layout utilizing underlying local connective features
03/21/2013US20130069235 Bonding pad structure for semiconductor devices
03/21/2013US20130069234 Structure and method for tunable interconnect scheme
03/21/2013US20130069233 Reverse Damascene Process
03/21/2013US20130069232 Damascene process for aligning and bonding through-silicon-via based 3d integrated circuit stacks
03/21/2013US20130069231 Solder cap bump in semiconductor package and method of manufacturing the same
03/21/2013US20130069230 Electronic assembly apparatus and associated methods
03/21/2013US20130069229 Package substrate and semiconductor package including the same
03/21/2013US20130069228 Flip-chip package structure and forming method thereof
03/21/2013US20130069227 Semiconductor Device and Method of Forming Protection and Support Structure for Conductive Interconnect Structure
03/21/2013US20130069226 Semiconductor package having interposer
03/21/2013US20130069225 Semiconductor Device and Method of Forming Protection and Support Structure for Conductive Interconnect Structure
03/21/2013US20130069224 Integrated circuit packaging system with routable underlayer and method of manufacture thereof
03/21/2013US20130069223 Flash memory card without a substrate and its fabrication method
03/21/2013US20130069222 Semiconductor Device and Method of Forming a Reconfigured Stackable Wafer Level Package with Vertical Interconnect
03/21/2013US20130069221 Semiconductor Device and Method of Forming Conductive Protrusions Over Conductive Pillars or Bond Pads as Fixed Offset Vertical Interconnect Structures
03/21/2013US20130069220 Method of Forming Contacts for a Memory Device
03/21/2013US20130069219 Semiconductor package and method for manufacturing the semiconductor package
03/21/2013US20130069218 High density package interconnect with copper heat spreader and method of making the same
03/21/2013US20130069217 Semiconductor device and electrode terminal
03/21/2013US20130069216 Base plate and semiconductor device
03/21/2013US20130069215 Semiconductor device
03/21/2013US20130069214 Lead frame, semiconductor device, method of manufacturing lead frame, and method of manufacturing semiconductor device
03/21/2013US20130069213 Power module package
03/21/2013US20130069212 Semiconductor device
03/21/2013US20130069211 Device including a semiconductor chip and metal foils
03/21/2013US20130069210 Power module package
03/21/2013US20130069206 Semiconductor device, semiconductor wafer and manufacturing method of semiconductor device
03/21/2013US20130069205 Semiconductor wafer and processing method therefor
03/21/2013US20130069170 Illumination and design rule method for double patterned slotted contacts
03/21/2013US20130069161 Integrated circuit structure having selectively formed metal cap
03/21/2013US20130069145 Power semiconductor device
03/21/2013US20130069132 Semiconductor storage device
03/21/2013US20130069063 Integrated circuit system with test pads and method of manufacture thereof
03/21/2013US20130069062 Leakage measurement of through silicon vias
03/21/2013US20130067743 Lead frame design to improve reliability
03/21/2013DE112011101961T5 Dichtungsmaterial, Solarzellenmodul und Leuchtdiode Sealing material, solar cell module and LED
03/21/2013DE112011101746T5 Ausrichtung von Graphitnanofasern in einem Wärmeschnittstellenmaterial Orientation of graphite nanofibers in a thermal interface material
03/21/2013DE112011101722T5 Erweiterte Modularität bei heterogenen 3D-Stapeln Advanced modularity in heterogeneous 3D stacking
03/21/2013DE102012216648A1 Elektronische Schaltung mit einem Transistor mit einer Verarmungssteuerstruktur und Verfahren zum Betreiben eines Transistors An electronic circuit with a transistor having a depletion control structure and methods for operating a transistor
03/21/2013DE102012108610A1 Chipmodul und Verfahren zum Herstellen eines Chipmoduls Chip module and method of producing a chip module,
03/21/2013DE102011083126A1 Microchip for use in computer, comprises heat dissipating enclosure containing graphene which is embedded into wrapping material and graphene structures that are grown on material of microchip which is wrapped with graphene structure
03/21/2013DE102011083002A1 Elektrisches Steuergerät mit Moldgehäuse Electrical control unit with molded housing
03/21/2013DE102011053680A1 Schaltungsanordnung zur Verminderung von Oszillationsneigung Circuitry to reduce to oscillation
03/21/2013DE10102540B4 Anordnung und Verfahren zur Identifikation von Substraten Arrangement and method for the identification of substrates
03/20/2013EP2571213A1 Differential signal transmission line, ic package, and method for testing said differential signal transmission line and ic package
03/20/2013EP2571053A1 Power semiconductor arrangement and method of forming thereof
03/20/2013EP2571052A1 Semiconductor device and method of manufacturing the same
03/20/2013EP2571051A2 Power overlay structure with leadframe connections
03/20/2013EP2571050A1 Semiconductor device
03/20/2013EP2571049A1 Electronic component and method for producing same
03/20/2013EP2571048A2 Method for producing a structure with a cavity sealed hermetically under a controlled atmosphere
03/20/2013EP2571047A2 Insulating ring for packaging, insulating ring assembly and package
03/20/2013EP2571045A2 Flip-chip hybridisation method for forming sealed cavities and systems obtained by such a method
03/20/2013EP2569390A1 Polymer compositions based on eco-friendly vegetable and/or animal oils as thermally conductive materials
03/20/2013EP1267402B1 Semiconductor device and method of production of same
03/20/2013CN202818832U A hand-held device equipped with a temperature adjusting device
03/20/2013CN202816942U A multi-chip packaging structure and a converter module
03/20/2013CN202816938U Fast recovery rectifier diode parallel modules
03/20/2013CN202816935U Testable semiconductor package, and system for the same
03/20/2013CN202816934U Stacked package
03/20/2013CN202816933U High performance semiconductor device
03/20/2013CN202816932U Pad structure of integrated circuit package
03/20/2013CN202816931U Lead frame structure of integrated circuit EMSOP10 package
03/20/2013CN202816930U Lead frame structure of MSOP8 package
03/20/2013CN202816929U Semiconductor lead frame facilitating heat dissipation
03/20/2013CN202816928U Combination structure of semiconductor lead frame and lower die spacing insert
03/20/2013CN202816927U Semiconductor lead frame preventing glue-overflow in injection molding
03/20/2013CN202816926U Semiconductor lead frame preventing reverse packaging
03/20/2013CN202816925U Lead frame for packaging semiconductor components
03/20/2013CN202816924U Power device packaging substrate
03/20/2013CN202816923U Lead-wire frame used for integrated circuit ceramic package housing
03/20/2013CN202816922U SOT89-3L package lead frame
03/20/2013CN202816921U SOT89-5L package lead frame