Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
03/2013
03/19/2013US8400440 Display device
03/19/2013US8399999 Electronic component, semiconductor device, methods of manufacturing the same, circuit board, and electronic instrument
03/19/2013US8399998 Semiconductor package requiring reduced manufacturing processes
03/19/2013US8399997 Power package including multiple semiconductor devices
03/19/2013US8399996 Chip carrier
03/19/2013US8399995 Semiconductor device including single circuit element for soldering
03/19/2013US8399994 Semiconductor chip and semiconductor package having the same
03/19/2013US8399993 Embedded package and method for manufacturing the same
03/19/2013US8399992 Package-on-package type semiconductor package
03/19/2013US8399991 Semiconductor device and method of forming through hole vias in die extension region around periphery of die
03/19/2013US8399990 Method of forming top electrode for capacitor and interconnection in integrated passive device (IPD)
03/19/2013US8399989 Metal pad or metal bump over pad exposed by passivation layer
03/19/2013US8399988 High performance sub-system design and assembly
03/19/2013US8399987 Microelectronic devices including conductive vias, conductive caps and variable thickness insulating layers
03/19/2013US8399986 Method for performing parallel stochastic assembly
03/19/2013US8399985 Mold design and semiconductor package
03/19/2013US8399984 Semiconductor package
03/19/2013US8399983 Semiconductor assembly with integrated circuit and companion device
03/19/2013US8399982 Nanotube-based directionally-conductive adhesive
03/19/2013US8399981 Ball grid array with improved single-ended and differential signal performance
03/19/2013US8399980 Electronic component used for wiring and method for manufacturing the same
03/19/2013US8399979 Electrode connection structure of semiconductor chip, conductive member, and semiconductor device and method for manufacturing the same
03/19/2013US8399978 Power semiconductor chip package
03/19/2013US8399977 Resin-sealed package and method of producing the same
03/19/2013US8399976 Resin sealed semiconductor device and manufacturing method therefor
03/19/2013US8399975 Stacked semiconductor package
03/19/2013US8399974 Methods of dicing stacked shingled strip constructions to form stacked die packages
03/19/2013US8399973 Data storage and stackable configurations
03/19/2013US8399972 Overmolded semiconductor package with a wirebond cage for EMI shielding
03/19/2013US8399970 Semiconductor device attached to island having protrusion
03/19/2013US8399969 Chip package and fabricating method thereof
03/19/2013US8399968 Non-leaded integrated circuit package system
03/19/2013US8399967 Package structure
03/19/2013US8399966 Inserts for directing molding compound flow and semiconductor die assemblies
03/19/2013US8399965 Layer structure with EMI shielding effect
03/19/2013US8399964 Multilayer structures for magnetic shielding
03/19/2013US8399963 Chip package and fabrication method thereof
03/19/2013US8399959 Programmable poly fuse
03/19/2013US8399958 Fuse part for semiconductor device
03/19/2013US8399956 Semiconductor devices and methods of manufacture thereof
03/19/2013US8399937 Semiconductor body and method for the design of a semiconductor body with a connecting line
03/19/2013US8399832 Scanning electron microscope and CD measurement calibration standard specimen
03/19/2013US8399781 Anti-tamper mesh
03/19/2013US8399577 Curable epoxy resin composition
03/19/2013US8399339 Nanosensors
03/19/2013US8399305 Semiconductor device and method of forming dam material with openings around semiconductor die for mold underfill using dispenser and vacuum assist
03/19/2013US8399296 Airgap micro-spring interconnect with bonded underfill seal
03/19/2013US8399295 Semiconductor device and its manufacture method
03/19/2013US8399293 Method for packaging electronic devices and integrated circuits
03/19/2013US8399264 Alignment inspection
03/19/2013US8397977 Solder containment brackets
03/19/2013US8397796 Porous media cold plate
03/19/2013CA2505593C Semiconductor substrate having copper/diamond composite material and method of making same
03/14/2013WO2013036948A1 Soldering relief method and semiconductor device employing same
03/14/2013WO2013036565A1 Direct metalization of electrical circuit structures
03/14/2013WO2013036395A1 Solder mask with anchor structures
03/14/2013WO2013036057A1 Semiconductor package and method of producing semiconductor package
03/14/2013WO2013035871A1 Sealant composition for electronic device
03/14/2013WO2013035869A1 Underfill composition
03/14/2013WO2013035868A1 Composition for electronic device
03/14/2013WO2013035819A1 Electronic component module and method for producing same
03/14/2013WO2013035768A1 Semiconductor device and method for manufacturing semiconductor device
03/14/2013WO2013035740A1 Curable resin composition for sealing optical semiconductor element and cured product thereof
03/14/2013WO2013035715A1 Module manufacturing method and module
03/14/2013WO2013035714A1 Method for producing module and terminal assembly
03/14/2013WO2013035655A1 Module substrate
03/14/2013WO2013035596A1 Semiconductor device and microphone
03/14/2013WO2013035542A1 Resin composition for sealing optical semiconductor, and optical semiconductor device using same
03/14/2013WO2013035337A1 Semiconductor module, circuit board
03/14/2013WO2013035206A1 Sealant composition for electronic device
03/14/2013WO2013035205A1 Underfill composition
03/14/2013WO2013035204A1 Composition for electronic device
03/14/2013WO2013035122A1 Microelectronic components, in particular cmos circuits, comprising thermoelectric cooling elements exploiting the seebeck/peltier effect, integrated in their structure
03/14/2013WO2013034628A1 Surface-mountable electronic component
03/14/2013WO2013034400A1 Method and apparatus for estimating the temperature of a semiconductor chip
03/14/2013WO2013034394A1 Component and method for producing a component
03/14/2013WO2013013204A3 Compliant interconnect pillars with orientation or geometry dependent on the position on a die or formed with a patterned structure between the pillar and a die pad for reduction of thermal stress
03/14/2013WO2013004543A9 Method for producing structured sintering connection layers and semiconductor component comprising a structured sintering connection layer
03/14/2013WO2012151003A3 Chip packages including through-silicon via dice with vertically integrated phased-array antennas and low-frequency and power delivery substrates
03/14/2013US20130063604 Fluid cooled thermal management technique for a high-density composite focal plane array
03/14/2013US20130063202 Secure anti-fuse with low voltage programming through localized diffusion heating
03/14/2013US20130063175 Semiconductor Device Components and Methods
03/14/2013US20130062790 Epoxy resin composition for semiconductor encapsulation and semiconductor device using the same
03/14/2013US20130062789 Manufacturing a filling of a gap region
03/14/2013US20130062788 Semiconductor apparatus
03/14/2013US20130062787 Photosensitive adhesive composition, and obtained using the same, adhesive film, adhesive sheet, semiconductor wafer with adhesive layer, semiconductor device and electronic part
03/14/2013US20130062786 Solder mask with anchor structures
03/14/2013US20130062785 Transistor structure and related transistor packaging method thereof
03/14/2013US20130062783 Chip packaging structure and manufacturing method for the same
03/14/2013US20130062782 Stacked semiconductor devices and fabrication method/equipment for the same
03/14/2013US20130062781 Chip arrangement and method for producing a chip arrangement
03/14/2013US20130062780 Chip stacking structure
03/14/2013US20130062779 Bonding contact area on a semiconductor substrate
03/14/2013US20130062778 Wiring substrate and semiconductor package
03/14/2013US20130062777 Semiconductor integrated circuit device
03/14/2013US20130062776 Electrical test structure applying 3d-ics bonding technology for stacking error measurement
03/14/2013US20130062775 Strain-Compensating Fill Patterns for Controlling Semiconductor Chip Package Interactions
03/14/2013US20130062774 Semiconductor Device and Method for Forming the Same
03/14/2013US20130062773 Contact for a non-volatile memory and method therefor
03/14/2013US20130062772 Semiconductor device and method for fabricating the same
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