| Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155) |
|---|
| 04/16/2013 | US8421210 Integrated circuit packaging system with dual side connection and method of manufacture thereof |
| 04/16/2013 | US8421209 Semiconductor device with lead terminals having portions thereof extending obliquely |
| 04/16/2013 | US8421208 Electrode pad having a recessed portion |
| 04/16/2013 | US8421207 Semiconductor device, electronic apparatus, and manufacturing methods thereof |
| 04/16/2013 | US8421206 Semiconductor device and connection checking method for semiconductor device |
| 04/16/2013 | US8421205 Power layout for integrated circuits |
| 04/16/2013 | US8421204 Embedded semiconductor power modules and packages |
| 04/16/2013 | US8421203 Integrated circuit packaging system with foldable substrate and method of manufacture thereof |
| 04/16/2013 | US8421202 Integrated circuit packaging system with flex tape and method of manufacture thereof |
| 04/16/2013 | US8421201 Integrated circuit packaging system with underfill and methods of manufacture thereof |
| 04/16/2013 | US8421200 Semiconductor integrated circuit device and method for fabricating the same |
| 04/16/2013 | US8421199 Semiconductor package structure |
| 04/16/2013 | US8421198 Integrated circuit package system with external interconnects at high density |
| 04/16/2013 | US8421197 Integrated circuit package system with warp-free chip |
| 04/16/2013 | US8421193 Integrated circuit device having through via and method for preparing the same |
| 04/16/2013 | US8421187 Semiconductor device and manufacturing method thereof |
| 04/16/2013 | US8421186 Electrically programmable metal fuse |
| 04/16/2013 | US8421167 Microelectromechanical device including an encapsulation layer of which a portion is removed to expose a substantially planar surface having a portion that is disposed outside and above a chamber and including a field region on which integrated circuits are formed, and methods for fabricating same |
| 04/16/2013 | US8421158 Chip structure with a passive device and method for forming the same |
| 04/16/2013 | US8421128 Semiconductor device heat dissipation structure |
| 04/16/2013 | US8421125 Semiconductor device with deviation compensation and method for fabricating the same |
| 04/16/2013 | US8421073 Test structures for through silicon vias (TSVs) of three dimensional integrated circuit (3DIC) |
| 04/16/2013 | US8421072 Electronic device having thermally managed electron path and method of thermal management of very cold electrons |
| 04/16/2013 | US8420955 Lead pin for package substrate |
| 04/16/2013 | US8420530 Nano-interconnects for atomic and molecular scale circuits |
| 04/16/2013 | US8420528 Manufacturing method of a semiconductor device having wirings |
| 04/16/2013 | US8420527 Semiconductor integrated circuit device |
| 04/16/2013 | US8420498 Alignment method of chips |
| 04/16/2013 | US8420463 Method for manufacturing pixel structure |
| 04/16/2013 | US8420444 Semiconductor device and method of manufacturing the same |
| 04/16/2013 | US8420427 Methods for implementation of a switching function in a microscale device and for fabrication of a microscale switch |
| 04/16/2013 | US8418478 Cooling apparatus having low profile extrusion and method of manufacture therefor |
| 04/11/2013 | WO2013052676A1 Systems and methods for air release in cavity packages |
| 04/11/2013 | WO2013052672A2 Power management applications of interconnect substrates |
| 04/11/2013 | WO2013052592A1 Wafer level applied thermal heat sink |
| 04/11/2013 | WO2013052544A1 Stub minimization with terminal grids offset from center of package |
| 04/11/2013 | WO2013052502A1 Determining spacing of semiconductor dies using a spatially varying charge distribution |
| 04/11/2013 | WO2013052458A1 Memory modules in packages |
| 04/11/2013 | WO2013052448A1 Stub minimization for wirebond assemblies without windows |
| 04/11/2013 | WO2013052418A1 Method for making electrical structure with air dielectric and related electrical structures |
| 04/11/2013 | WO2013052411A1 Stub minimization for wirebond assemblies without windows |
| 04/11/2013 | WO2013052384A1 Gate array architecture with multiple programmable regions |
| 04/11/2013 | WO2013052373A1 Stub minimization for multi-die wirebond assemblies with parallel windows |
| 04/11/2013 | WO2013052347A1 Memory module in a package and its pin configuration |
| 04/11/2013 | WO2013052345A1 Stub minimization for assemblies without wirebonds to package substrate |
| 04/11/2013 | WO2013052342A1 Interposer for esd, emi, and emc |
| 04/11/2013 | WO2013052323A1 Stub minimization using duplicate sets of terminals for wirebond assemblies without windows |
| 04/11/2013 | WO2013052322A2 Stub minimization using duplicate sets of terminals for wirebond assemblies without windows |
| 04/11/2013 | WO2013052320A1 Stub minimization using duplicate sets of signal terminals in assemblies without wirebonds to package substrate |
| 04/11/2013 | WO2013052080A1 Stub minimization for multi-die wirebond assemblies with orthogonal windows |
| 04/11/2013 | WO2013051615A1 Sealing agent for semiconductor light-emitting device, sealing material for semiconductor light-emitting device using same, and semiconductor light-emitting device |
| 04/11/2013 | WO2013051600A1 Curable resin composition, tablet of curable resin composition, molded body, semiconductor package, semiconductor component and light emitting diode |
| 04/11/2013 | WO2013051587A1 Flat-plate cooling device and method for using same |
| 04/11/2013 | WO2013051463A1 Wafer bonding method and structure of bonding part of wafer |
| 04/11/2013 | WO2013051282A1 Semiconductor device manufacturing method |
| 04/11/2013 | WO2013051247A1 Stacked type semiconductor device and printed circuit board |
| 04/11/2013 | WO2013051182A1 Semiconductor device and method for manufacturing same |
| 04/11/2013 | WO2013050948A1 Electronics package for high temperature downhole applications |
| 04/11/2013 | WO2013050877A1 Removing conductive material to form conductive features in a substrate |
| 04/11/2013 | WO2013050813A1 Liquid cooling device for electronic cards |
| 04/11/2013 | WO2013049965A1 Dragonfly wire bonding |
| 04/11/2013 | WO2013025130A9 Heat removal device |
| 04/11/2013 | WO2013016276A3 Hybrid interconnect technology |
| 04/11/2013 | WO2013006209A3 Lead carrier with thermally fused package components |
| 04/11/2013 | WO2012166911A3 Low void solder joint for multiple reflow applications |
| 04/11/2013 | WO2012087432A3 Cooling of coplanar active circuits |
| 04/11/2013 | US20130090227 Lead-free glass for semiconductor encapsulation |
| 04/11/2013 | US20130089971 Devices including, methods using, and compositions of reflowable getters |
| 04/11/2013 | US20130089952 Packaging Process Tools and Packaging Methods for Semiconductor Devices |
| 04/11/2013 | US20130088838 Die package, method of manufacturing the same, and systems including the same |
| 04/11/2013 | US20130088836 Heat dissipation structure for electronic device |
| 04/11/2013 | US20130088255 Stacked semiconductor devices |
| 04/11/2013 | US20130088212 Determining spacing using a spatially varying charge distribution |
| 04/11/2013 | US20130087934 Substrate for display device and method for manufacturing the same |
| 04/11/2013 | US20130087933 Structure for encapsulating an electronic device and method for making such a structure |
| 04/11/2013 | US20130087931 Semiconductor Device and Method of Forming Reconstituted Wafer with Larger Carrier to Achieve More EWLB Packages per Wafer with Encapsulant Deposited Under Temperature and Pressure |
| 04/11/2013 | US20130087930 Semiconductor structure and method for making same |
| 04/11/2013 | US20130087929 Semiconductor Packages And Electronic Systems Including The Same |
| 04/11/2013 | US20130087928 Semiconductor Device and Method of Forming Conductive TSV With Insulating Annular Ring |
| 04/11/2013 | US20130087927 Multimedia providing service |
| 04/11/2013 | US20130087926 Stacked semiconductor devices |
| 04/11/2013 | US20130087925 Packaging Structures of Integrated Circuits |
| 04/11/2013 | US20130087924 Semiconductor device and method for manufacturing same |
| 04/11/2013 | US20130087923 Multi component dielectric layer |
| 04/11/2013 | US20130087922 Semiconductor Resistance Element, Semiconductor Module Including The Same, And Processor-Based System Including The Semiconductor Module |
| 04/11/2013 | US20130087921 Semiconductor Arrangement for Galvanically Isolated Signal Transmission and Method for Producing Such an Arrangement |
| 04/11/2013 | US20130087920 Integrated Circuit Structure Having Dies with Connectors of Different Sizes |
| 04/11/2013 | US20130087919 Lightweight and compact through-silicon via stack package with excellent electrical connections and method for manufacturing the same |
| 04/11/2013 | US20130087918 Ball Grid Array with Improved Single-Ended and Differential Signal Performance |
| 04/11/2013 | US20130087917 Semiconductor package |
| 04/11/2013 | US20130087916 Methods of Packaging Semiconductor Devices and Structures Thereof |
| 04/11/2013 | US20130087915 Copper Stud Bump Wafer Level Package |
| 04/11/2013 | US20130087914 Wafer level chip scale package and method of manufacturing the same |
| 04/11/2013 | US20130087913 Semiconductor Device and Method of Forming Bump on Substrate to Prevent ELK ILD Delamination During Reflow Process |
| 04/11/2013 | US20130087912 Semiconductor device, electronic device, and semiconductor device manufacturing method |
| 04/11/2013 | US20130087911 Integrated circuit package structure |
| 04/11/2013 | US20130087910 Semiconductor device having multiple bump heights and multiple bump diameters |
| 04/11/2013 | US20130087909 Semiconductor device having improved contact structure |
| 04/11/2013 | US20130087908 Bump with protection structure |
| 04/11/2013 | US20130087907 Metal Features to Reduce Crack-Inducing Stresses in Metallization Stacks |