Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
05/2013
05/07/2013US8435883 Post passivation interconnection schemes on top of IC chips
05/07/2013US8435865 Method of manufacturing super-junction semiconductor device
05/07/2013US8435861 Method of manufacturing a semiconductor device having different kinds of insulating films with different thicknesses
05/07/2013US8435840 Fuse box guard rings including protrusions and methods of forming same
05/07/2013US8435835 Semiconductor device and method of forming base leads from base substrate as standoff for stacking semiconductor die
05/07/2013US8435605 Flexible substrates having a thin-film barrier
05/07/2013US8434906 Lighting system with thermal management system
05/07/2013US8434547 Electronic apparatus
05/02/2013WO2013063179A1 Low energy etch process for nitrogen-containing dielectric layer
05/02/2013WO2013062761A1 Heatsink attachment module
05/02/2013WO2013062593A1 3d interconnect structure comprising fine pitch single damascene backside metal redistribution lines combined with through-silicon vias
05/02/2013WO2013062590A1 3d interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approach
05/02/2013WO2013062533A1 Interposer for hermetic sealing of sensor chips and for their integration with integrated circuit chips
05/02/2013WO2013062397A1 Design for a support for mounting a microelectronic chip for a 5x3.2 mm half-etched dfn housing with a ground pin
05/02/2013WO2013062131A1 Flow channel member, heat exchanger using same, semiconductor device, and device for manufacturing semiconductor
05/02/2013WO2013062123A1 Vinyl polymer powder, curable resin composition, and cured product
05/02/2013WO2013061981A1 Laminate and method for producing component for power semiconductor modules
05/02/2013WO2013061946A1 Multilayer wiring substrate, probe card, and method for manufacturing multilayer wiring substrate
05/02/2013WO2013061785A1 Physical quantity sensor device and method for producing same
05/02/2013WO2013061688A1 Resin composition
05/02/2013WO2013061500A1 Flexible wiring board and method for manufacturing same
05/02/2013WO2013061478A1 Resin composition
05/02/2013WO2013061392A1 Semiconductor module
05/02/2013WO2013061250A1 Cooling unit
05/02/2013WO2013061183A1 Molded electrically insulating housing for semiconductor components or assemblies and production method
05/02/2013WO2013060975A1 Flip-chip hybridization of microelectronic components by local heating of connecting elements
05/02/2013WO2013060055A1 Led lighting lamp
05/02/2013WO2013025573A3 Solder bump bonding in semiconductor package using solder balls having high-temperature cores
05/02/2013WO2013003695A3 Bumpless build-up layer package warpage reduction
05/02/2013WO2012176083A3 Active cooling device with electro-statically moving electrode and method of active cooling with electro-statically moving electrode
05/02/2013WO2012131007A3 Thermoelectric assembly and method for producing a thermoelectric assembly
05/02/2013WO2012033801A3 Radio frequency communications system
05/02/2013US20130109798 Resin composition and semiconductor device produced by using the same
05/02/2013US20130109135 Method of fabricating a semiconductor device having an interposer
05/02/2013US20130107482 Printed circuit board
05/02/2013US20130107468 Apparatus and method for stacking integrated circuits
05/02/2013US20130107259 Overlay target geometry for measuring multiple pitches
05/02/2013US20130106868 Encapsulation of ems devices on glass
05/02/2013US20130106448 Test key structure and method for measuring step height by such test key structure
05/02/2013US20130106246 Temperature-compensated micromechanical resonator
05/02/2013US20130106000 Alignment accuracy mark
05/02/2013US20130105999 Thin semiconductor die package
05/02/2013US20130105998 Photosensitive adhesive composition, photosensitive adhesive film, and semiconductor device using each
05/02/2013US20130105997 Silicone resin composition, silicone resin sheet, optical semiconductor element device, and producing method of silicone resin sheet
05/02/2013US20130105996 Low energy etch process for nitrogen-containing dielectric layer
05/02/2013US20130105995 Semiconductor device structures and their fabrication
05/02/2013US20130105994 Heatsink attachment module
05/02/2013US20130105993 Semiconductor device interconnect
05/02/2013US20130105992 Semiconductor component having a stack of semiconductor chips and method for producing the same
05/02/2013US20130105991 Embedded wafer level package for 3d and package-on-package applications, and method of manufacture
05/02/2013US20130105990 Semiconductor device
05/02/2013US20130105989 Semiconductor Device and Method of Forming Interposer Frame Over Semiconductor Die to Provide Vertical Interconnect
05/02/2013US20130105988 Semiconductor package including semiconductor chip with through opening
05/02/2013US20130105987 Laminate interconnect having a coaxial via structure
05/02/2013US20130105986 Semiconductor device with vias on a bridge connecting two buses
05/02/2013US20130105985 Semiconductor device
05/02/2013US20130105984 Semiconductor device package adapter
05/02/2013US20130105983 Semiconductor device and method forming patterns with spaced pads in trim region
05/02/2013US20130105982 Land grid array semiconductor package and method of manufacture
05/02/2013US20130105981 Flattened substrate surface for substrate bonding
05/02/2013US20130105980 Sinterable bonding material using copper nanoparticles, process for producing same, and method of bonding electronic component
05/02/2013US20130105979 Package on Package Devices and Methods of Packaging Semiconductor Dies
05/02/2013US20130105978 Silicon submount for light emitting diode and method of forming the same
05/02/2013US20130105977 Electronic Device and Method for Fabricating an Electronic Device
05/02/2013US20130105976 Method to align mask patterns
05/02/2013US20130105975 Semiconductor chip device with thermal interface material frame
05/02/2013US20130105974 Semiconductor package featuring flip-chip die sandwiched between metal layers
05/02/2013US20130105973 Embedded wafer level package for 3d and package-on-package applications, and method of manufacture
05/02/2013US20130105972 Stacked packages using laser direct structuring
05/02/2013US20130105971 Solder Interconnect Pads with Current Spreading Layers
05/02/2013US20130105970 Semiconductor Device and Method of Forming Conductive Posts and Heat Sink Over Semiconductor Die Using Leadframe
05/02/2013US20130105969 Solder bonding process forming a semiconductor chip in multiple stages on a 3-dimensional stacked assembly
05/02/2013US20130105968 TSV Backside Processing Using Copper Damascene Interconnect Technology
05/02/2013US20130105967 Semiconductor Die and Method of Forming Sloped Surface in Photoresist Layer to Enhance Flow of Underfill Material Between Semiconductor Die and Substrate
05/02/2013US20130105966 Three-dimensional chip-to-wafer integration
05/02/2013US20130105965 Chip
05/02/2013US20130105964 Semiconductor Device
05/02/2013US20130105963 Semiconductor Device and Method of Forming Thermal Interface Material and Heat Spreader Over Semiconductor Die
05/02/2013US20130105962 Thermal dissipation in chip
05/02/2013US20130105961 Low inductance power module
05/02/2013US20130105960 Low Stray Inductance Power Module
05/02/2013US20130105959 Structure for hermetic encapsulation of a device and an electronic component
05/02/2013US20130105958 Compact Wirebonded Power Quad Flat No-Lead (PQFN) Package
05/02/2013US20130105957 Lead frame semiconductor device
05/02/2013US20130105956 Power module package and method for manufacturing the same
05/02/2013US20130105955 Semiconductor package and method for manufacturing the same and semiconductor package module having the same
05/02/2013US20130105954 Semiconductor package
05/02/2013US20130105953 Power module package
05/02/2013US20130105952 Shielded encapsulating structure and manufacturing method thereof
05/02/2013US20130105951 Block power switch with embedded electrostatic discharge (esd) protection and adaptive body biasing
05/02/2013US20130105950 3d chip package with shielded structures
05/02/2013US20130105949 Laminated semiconductor substrate, semiconductor substrate, laminated chip package and method of manufacturing the same
05/02/2013US20130105947 High aspect ratio and reduced undercut trench etch process for a semiconductor substrate
05/02/2013US20130105941 Semiconductor device including in wafer inductors, related method and design structure
05/02/2013US20130105940 Semiconductor device having a fuse element
05/02/2013US20130105939 Semiconductor device
05/02/2013US20130105929 Resin composition
05/02/2013US20130105559 Conductive sidewall for microbumps
05/02/2013US20130105125 Indoor unit of air-conditioning apparatus
05/02/2013US20130105124 Heat dissipation fan