Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
05/2013
05/30/2013WO2013078068A1 Passive devices for 3d non-volatile memory
05/30/2013WO2013077708A1 Curable composition
05/30/2013WO2013077706A1 Curable composition
05/30/2013WO2013077705A1 Organopolysiloxane
05/30/2013WO2013077701A1 Method for producing organopolysiloxane
05/30/2013WO2013077700A1 Curable composition
05/30/2013WO2013077351A1 Epoxy resin mixture, epoxy resin composition, prepreg, and cured products thereof
05/30/2013WO2013077219A1 Resin composition for optical material
05/30/2013WO2013077218A1 Resin composition for optical semiconductor sealing material
05/30/2013WO2013077199A1 Package for housing electronic component, and electronic apparatus
05/30/2013WO2013076909A1 Resin for electrical components, semiconductor device, and wiring board
05/30/2013WO2013076830A1 Electronic component and method for producing same
05/30/2013WO2013076543A2 Method for preventing an electrical shortage in a semiconductor layer stack, thin substrate cpv cell, and solar cell assembly
05/30/2013WO2013076527A1 Integrated circuit, integrated circuit package and method of providing protection against an electrostatic discharge event
05/30/2013WO2013076064A1 Method for making contact with a semiconductor and contact arrangement for a semiconductor
05/30/2013WO2013075947A1 Semiconductor device with through-substrate via covered by a solder ball and related method of production
05/30/2013WO2013075759A1 Heat sink device and method for producing a heat sink device
05/30/2013WO2013075754A1 A hvdc thyristor valve assembly
05/30/2013WO2013075384A1 Ball grid array (bga) packaging structures and method for manufacruring the same
05/30/2013WO2013075383A1 Quad flat no-lead (qfn) packaging structures and method for manufacturing the same
05/30/2013WO2013075375A1 Copper interconnect structure and method for manufacturing the same
05/30/2013WO2013045367A3 Electronic assembly comprising a high temperature-stable substrate basic material, method for the production thereof and use thereof in a power electronics
05/30/2013WO2013045345A3 Layer composite for connecting electronic components, comprising a compensation layer, bonding layers and connection layers, method for making same, and circuit arrangement containing same
05/30/2013WO2013021869A9 Novel cyanic acid ester compound, method for producing same, curable resin composition containing novel cyanic acid ester compound, and cured product of curable resin composition
05/30/2013WO2013019541A4 Low-stress vias
05/30/2013WO2013016273A3 High voltage mosfet and method of making the same
05/30/2013WO2012152672A3 Method for producing reconstituted wafers with support of the chips during their encapsulation
05/30/2013US20130137259 Process for Making Contact with and Housing Integrated Circuits
05/30/2013US20130137216 Method of manufacturing semiconductor device having plural semiconductor chips stacked one another
05/30/2013US20130135824 Power Semiconductor Device
05/30/2013US20130135239 Contact structure and semiconductor device
05/30/2013US20130135041 Ultra high speed signal transmission/reception
05/30/2013US20130134610 Epoxy resin composition and semiconductor device
05/30/2013US20130134608 Functional particle, functional particle group, filler, resin composition for electronic component, electronic component and semiconductor device
05/30/2013US20130134607 Interposer for stacked semiconductor devices
05/30/2013US20130134606 Semiconductor packages
05/30/2013US20130134605 Semiconductor assemblies, stacked semiconductor devices, and methods of manufacturing semiconductor assemblies and stacked semiconductor devices
05/30/2013US20130134603 Semiconductor Devices Including Protected Barrier Layers
05/30/2013US20130134602 Flip chip package for dram with two underfill materials
05/30/2013US20130134601 Semiconductor device having shielded conductive vias and method for manufacturing the same
05/30/2013US20130134600 Semiconductor device and method for manufacturing the same
05/30/2013US20130134599 Method and structure of integrated micro electro-mechanical systems and electronic devices using edge bond pads
05/30/2013US20130134598 Semiconductor Device and Method of Forming a Power MOSFET With Interconnect Structure to Achieve Lower RDSON
05/30/2013US20130134597 Chip on film, and method of manufacture thereof
05/30/2013US20130134596 Wafer Level Semiconductor Package
05/30/2013US20130134595 Methods and apparatus to improve reliability of isolated vias
05/30/2013US20130134594 Semiconductor device, semiconductor element, and method for manufacturing semiconductor device
05/30/2013US20130134593 Semiconductor device manufacturing method, semiconductor device, and semiconductor element
05/30/2013US20130134592 Wire and semiconductor device
05/30/2013US20130134591 Bonding Material for Semiconductor Devices
05/30/2013US20130134590 Formation of air gap with protection of metal lines
05/30/2013US20130134589 Chip-package and a method for forming a chip-package
05/30/2013US20130134588 Package-On-Package (PoP) Structure and Method
05/30/2013US20130134587 Microelectronic package with self-heating interconnect
05/30/2013US20130134586 Semiconductor Device Having Vertically Offset Bond on Trace Interconnects on Recessed and Raised Bond Fingers
05/30/2013US20130134585 Integrated circuit assembly and method of making
05/30/2013US20130134584 Semiconductor device having wiring pad and wiring formed on the same wiring layer
05/30/2013US20130134583 Semiconductor device and manufacturing method thereof
05/30/2013US20130134582 Novel bump structures for multi-chip packaging
05/30/2013US20130134581 Planarized bumps for underfill control
05/30/2013US20130134580 Semiconductor Device and Method of Forming RDL Under Bump for Electrical Connection to Enclosed Bump
05/30/2013US20130134579 Structure for High-Speed Signal Integrity in Semiconductor Package with Single-Metal-Layer Substrate
05/30/2013US20130134578 Device having multiple wire bonds for a bond area and methods thereof
05/30/2013US20130134577 Ribbon bonding in an electronic package
05/30/2013US20130134575 Packaged die for heat dissipation and method therefor
05/30/2013US20130134574 Semiconductor device and method for fabricating the same
05/30/2013US20130134573 Semiconductor device and methods of manufacturing semiconductor devices
05/30/2013US20130134572 Semiconductor device including cladded base plate
05/30/2013US20130134571 Power module package
05/30/2013US20130134569 Semiconductor package
05/30/2013US20130134568 Lead frame and flip chip package device thereof
05/30/2013US20130134567 Lead frame and semiconductor package structure thereof
05/30/2013US20130134566 Structure of very high insertion loss of the substrate noise decoupling
05/30/2013US20130134565 System-in-package module and method of fabricating the same
05/30/2013US20130134563 Electrical Connection Structure
05/30/2013US20130134560 Semiconductor structure comprising moisture barrier and conductive redistribution layer
05/30/2013US20130134559 Chip-on-Wafer Structures and Methods for Forming the Same
05/30/2013US20130134553 Interposer and semiconductor package with noise suppression features
05/30/2013US20130134548 Semiconductor device and manufacturing method thereof
05/30/2013US20130134502 Wafer level chip scale package
05/30/2013US20130134494 Semiconductor devices and methods of manufacturing the same
05/30/2013US20130134437 Method for forming gallium nitride devices with conductive regions
05/30/2013US20130134421 Semiconductor chip having plural penetrating electrodes that penetrate therethrough
05/30/2013US20130134118 Frame structure for solar cell module
05/30/2013US20130134117 Frame structure for solar cell module
05/29/2013EP2597677A1 Semiconductor device with through-substrate via covered by a solder ball and related method of production
05/29/2013EP2597676A2 Power module package
05/29/2013EP2597675A1 Encapsulated semiconductor device and method for producing same
05/29/2013EP2597671A2 Method for permanently connecting two metal surfaces
05/29/2013EP2596550A1 Antenna
05/29/2013EP2596531A1 Embedded structures and methods of manufacture thereof
05/29/2013EP2596530A2 Stackable molded microelectronic packages with area array unit connectors
05/29/2013EP2596529A2 Stackable molded microelectronic packages
05/29/2013EP2596528A2 Core-sheath ribbon wire
05/29/2013EP2596526A2 Metal-contamination -free through-substrate via structure
05/29/2013EP2596524A2 Process for direct bonding two elements comprising copper portions and dielectric materials
05/29/2013EP2596522A1 Method of fabrication of semiconductor device
05/29/2013EP2595940A1 Polycrystalline aluminum nitride material and method of production thereof
05/29/2013DE19964501B4 Chipanordnung Chip system
05/29/2013DE112011101862T5 Elektrische Verbindungsvorrichtung Electrical connection device
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