| Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155) |
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| 06/25/2013 | US8471372 Thin flip chip package structure |
| 06/25/2013 | US8471371 Semiconductor wiring assembly, semiconductor composite wiring assembly, and resin-sealed semiconductor device |
| 06/25/2013 | US8471370 Semiconductor element with semiconductor die and lead frames |
| 06/25/2013 | US8471369 Method and apparatus for reducing plasma process induced damage in integrated circuits |
| 06/25/2013 | US8471367 Semiconductor device and method for manufacturing semiconductor device |
| 06/25/2013 | US8471361 Integrated chip package structure using organic substrate and method of manufacturing the same |
| 06/25/2013 | US8471356 Programmable anti-fuse structures with conductive material islands |
| 06/25/2013 | US8471355 AND-type one time programmable memory cell |
| 06/25/2013 | US8471354 E-fuse structure of semiconductor device |
| 06/25/2013 | US8471345 Biometric sensor assembly with integrated visual indicator |
| 06/25/2013 | US8471297 Semiconductor memory device and method of manufacturing the same |
| 06/25/2013 | US8471296 FinFET fuse with enhanced current crowding |
| 06/25/2013 | US8471292 Semiconductor ESD device and method of making same |
| 06/25/2013 | US8471285 Light-emitting diode package including a cavity with a plurality of side-walls with different inclinations |
| 06/25/2013 | US8471280 Silicone based reflective underfill and thermal coupler |
| 06/25/2013 | US8470936 Liquid epoxy resin composition for semiconductor encapsulation |
| 06/25/2013 | CA2716920C Semiconductor device, and communication apparatus and electronic apparatus having the same |
| 06/20/2013 | WO2013090914A1 A method of lowering capacitances of conductive apertures and an interposer capable of being reverse biased to achieve reduced capacitance |
| 06/20/2013 | WO2013089780A1 Package for a microelectronic die, microelectronic assembly containing same, microelectronic system, and method of reducing die stress in a microelectronic package |
| 06/20/2013 | WO2013089754A1 Packaged semiconductor die with bumpless die-package interface for bumpless build-up layer (bbul) packages |
| 06/20/2013 | WO2013089677A1 Heat dissipation device loading mechanisms |
| 06/20/2013 | WO2013089673A1 Through-silicon via resonators in chip packages and methods of assembling same |
| 06/20/2013 | WO2013089376A1 Lead frame and semiconductor package manufactured by using the same |
| 06/20/2013 | WO2013089099A1 Power module substrate, substrate for power module with heat sink, power module, paste for forming flux component penetration prevention layer, and bonding method for article to be bonded |
| 06/20/2013 | WO2013088945A1 Bonding section structure, bonding method therefor, and electronic component |
| 06/20/2013 | WO2013088870A1 Power semiconductor module and power module |
| 06/20/2013 | WO2013088864A1 Semiconductor device |
| 06/20/2013 | WO2013088855A1 Method for manufacturing semiconductor device |
| 06/20/2013 | WO2013088054A1 Electronic device with cooling by a liquid metal spreader |
| 06/20/2013 | WO2013088047A1 Thermally conductive and electrically insulating link between at least one electronic component and a completely or partially metal radiator |
| 06/20/2013 | WO2013087760A1 Forming a via electrical connection |
| 06/20/2013 | WO2013087639A1 Electrically variable impedance matching network for an hf power transistor |
| 06/20/2013 | WO2013087494A1 System for regulating the temperature of an assembly of electronic components or for recovering the thermal energy dissipated by an assembly of electronic components |
| 06/20/2013 | WO2013087390A1 Housing cover for an electronics housing and electronics housing formed therewith |
| 06/20/2013 | WO2013087101A1 Substrate-supported circuit parts with free-standing three-dimensional structures |
| 06/20/2013 | WO2013086754A1 Universal encapsulation substrate, encapsulation structure and encapsulation method |
| 06/20/2013 | WO2013086741A1 Emi shielding and thermal dissipation for semiconductor device |
| 06/20/2013 | WO2013052322A3 Stub minimization using duplicate sets of terminals for wirebond assemblies without windows |
| 06/20/2013 | WO2012143770A8 Cooling fin structure |
| 06/20/2013 | US20130158188 Resin composition and semiconductor device produced using resin composition |
| 06/20/2013 | US20130157418 Integrated circuit packaging system with interconnects and method of manufacture thereof |
| 06/20/2013 | US20130157393 Semiconductor device and manufacturing method of the same |
| 06/20/2013 | US20130155759 Test Structures, Methods of Manufacturing Thereof, Test Methods, and MRAM Arrays |
| 06/20/2013 | US20130155636 Dummy through-silicon via capacitor |
| 06/20/2013 | US20130155555 Integrated circuit and method of providing electrostatic discharge protection within such an integrated circuit |
| 06/20/2013 | US20130154608 Determining alignment using a spatially varying charge distribution |
| 06/20/2013 | US20130154129 Anisotropic conductive film and semiconductor device bonded by the same |
| 06/20/2013 | US20130154128 Automatic Place and Route Method for Electromigration Tolerant Power Distribution |
| 06/20/2013 | US20130154127 Microspring Structures Adapted for Target Device Cooling |
| 06/20/2013 | US20130154126 Semiconductor device |
| 06/20/2013 | US20130154125 Adhesive film and electronic device including the same |
| 06/20/2013 | US20130154124 Method for packaging semiconductors at a wafer level |
| 06/20/2013 | US20130154123 Semiconductor Device and Fabrication Method |
| 06/20/2013 | US20130154122 Semiconductor chip with underfill anchors |
| 06/20/2013 | US20130154121 Integrated circuit packaging system with film assistance mold and method of manufacture thereof |
| 06/20/2013 | US20130154120 Integrated circuit packaging system with package-on-package and method of manufacture thereof |
| 06/20/2013 | US20130154119 Integrated circuit packaging system with terminals and method of manufacture thereof |
| 06/20/2013 | US20130154118 Integrated circuit packaging system with contacts and method of manufacture thereof |
| 06/20/2013 | US20130154117 Stacked die in die bga package |
| 06/20/2013 | US20130154116 Integrated circuit packaging system with perimeter antiwarpage structure and method of manufacture thereof |
| 06/20/2013 | US20130154115 Integrated circuit packaging system with leads and method of manufacture thereof |
| 06/20/2013 | US20130154114 Semiconductor device and method for making same |
| 06/20/2013 | US20130154113 Perforation patterned electrical interconnects |
| 06/20/2013 | US20130154112 Method for Forming Isolation Trenches in Micro-Bump Interconnect Structures and Devices Obtained Thereof |
| 06/20/2013 | US20130154111 Semiconductor device including through electrode and method of manufacturing the same and stacked package including semiconductor device and method of manufacturing the same |
| 06/20/2013 | US20130154110 Direct write interconnections and method of manufacturing thereof |
| 06/20/2013 | US20130154109 Method of lowering capacitances of conductive apertures and an interposer capable of being reverse biased to achieve reduced capacitance |
| 06/20/2013 | US20130154108 Semiconductor Device and Method of Forming Vertical Interconnect Structure with Conductive Micro Via Array for 3-D FO-WLCSP |
| 06/20/2013 | US20130154107 Integrated circuit packaging system with coupling features and method of manufacture thereof |
| 06/20/2013 | US20130154106 Stacked Packaging Using Reconstituted Wafers |
| 06/20/2013 | US20130154105 Integrated circuit packaging system with routable trace and method of manufacture thereof |
| 06/20/2013 | US20130154104 Integrated circuits and methods of forming conductive lines and conductive pads therefor |
| 06/20/2013 | US20130154103 Semiconductor package having multi pitch ball land |
| 06/20/2013 | US20130154102 Semiconductor device and its manufacture method |
| 06/20/2013 | US20130154101 Semiconductor device and method for manufacturing the same |
| 06/20/2013 | US20130154100 Method of patterning a semiconductor device having improved spacing and shape control and a semiconductor device |
| 06/20/2013 | US20130154099 Pad over interconnect pad structure design |
| 06/20/2013 | US20130154098 Liner-free tungsten contact |
| 06/20/2013 | US20130154097 Semiconductor structure and manufacturing method of the same |
| 06/20/2013 | US20130154096 Semiconductor device and manufacturing method thereof |
| 06/20/2013 | US20130154095 Semiconductor devices connected by anisotropic conductive film comprising conductive microspheres |
| 06/20/2013 | US20130154094 Anisotropic conductive film composition, anisotropic conductive film, and semiconductor device |
| 06/20/2013 | US20130154093 Anisotropic conductive film composition, anisotropic conductive film, and semiconductor device bonded by the same |
| 06/20/2013 | US20130154092 Integrated circuit packaging system with conductive pillars and method of manufacture thereof |
| 06/20/2013 | US20130154091 Semiconductor device packaging using encapsulated conductive balls for package-on-package back side coupling |
| 06/20/2013 | US20130154090 Semiconductor Device and Method of Forming Interconnect Structure with Conductive Pads Having Expanded Interconnect Surface Area for Enhanced Interconnection Properties |
| 06/20/2013 | US20130154089 Bump including diffusion barrier bi-layer and manufacturing method thereof |
| 06/20/2013 | US20130154087 Method for forming interconnection pattern and semiconductor device |
| 06/20/2013 | US20130154086 Exposing Connectors in Packages Through Selective Treatment |
| 06/20/2013 | US20130154085 Integrated circuit packaging system with heat conduction and method of manufacture thereof |
| 06/20/2013 | US20130154084 Semiconductor module |
| 06/20/2013 | US20130154083 Semiconductor package |
| 06/20/2013 | US20130154082 Semiconductor device, semiconductor device manufacturing method, and electronic device |
| 06/20/2013 | US20130154081 Semiconductor module |
| 06/20/2013 | US20130154080 Integrated circuit packaging system with leads and method of manufacture thereof |
| 06/20/2013 | US20130154079 Integrated circuit packaging system with substrate mold gate and method of manufacture thereof |
| 06/20/2013 | US20130154078 Integrated circuit packaging system with heat slug and method of manufacture thereof |
| 06/20/2013 | US20130154077 Chip package and method for forming the same |
| 06/20/2013 | US20130154076 Semiconductor Device and Method of Forming Leadframe Interposer Over Semiconductor Die and TSV Substrate for Vertical Electrical Interconnect |
| 06/20/2013 | US20130154075 Semiconductor device |