Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
12/1997
12/30/1997US5703753 Electronic assembly
12/30/1997US5703747 Multichip semiconductor structures with interchip electrostatic discharge protection, and fabrication methods therefore
12/30/1997US5703744 Circuit substrate including anodization control means
12/30/1997US5703408 Bonding pad structure and method thereof
12/30/1997US5703407 Resin-sealed type semiconductor device
12/30/1997US5703406 Interconnection structure for attaching a semiconductor device to a substrate
12/30/1997US5703405 Integrated circuit chip formed from processing two opposing surfaces of a wafer
12/30/1997US5703404 Semiconductor device comprising an SiOF insulative film
12/30/1997US5703403 Electrode for semiconductor device and method for producing the same
12/30/1997US5703402 Output mapping of die pad bonds in a ball grid array
12/30/1997US5703401 Miniature semiconductor device for surface mounting
12/30/1997US5703400 Fabrication and structures of two-sided molded circuit modules with flexible interconnect layers
12/30/1997US5703399 Semiconductor power module
12/30/1997US5703398 Semiconductor integrated circuit device and method of producing the semiconductor integrated circuit device
12/30/1997US5703397 Sealing member; metallic bonding layer; improved heat-radiating property; increases number of pins and reduces size of package
12/30/1997US5703396 Plastic encapsulated semiconductor device having wing leads
12/30/1997US5703395 Electronic memory device having a non-peripheral contact for reading and writing
12/30/1997US5703381 Semiconductor integrated circuit
12/30/1997US5703295 Vibration sensing method and apparatus therefor
12/30/1997US5703195 Polyglycidylphenyl ethers of alkylene or alkyleneoxy chains for use in microelectronics adhesives
12/30/1997US5702996 Contains silicon, boron, potassium oxides, refining agents and filler; for printed circuits
12/30/1997US5702985 Hermetically sealed ceramic integrated circuit heat dissipating package fabrication method
12/30/1997US5702983 Forming a smooth surface on a semiconductor device without etching back the irregular tungsten interconnection layer by forming a bonded aluminum alloy layer without melting the tungsten layer
12/30/1997US5702980 Method for forming intermetal dielectric with SOG etchback and CMP
12/30/1997US5702979 Method of forming a landing pad structure in an integrated circuit
12/30/1997US5702969 Buried bit line DRAM cells and fabricating methods therefor
12/30/1997US5702956 Removing a top barrier layer over a metal layer, measuring the thickness of silicon dioxide layer, dielectric layer
12/30/1997US5702814 Gold wire for bonding
12/30/1997US5702775 Microelectronic device package and method
12/30/1997US5702583 Using photoresist
12/30/1997US5702567 Plurality of photolithographic alignment marks with shape, size and spacing based on circuit pattern features
12/30/1997US5702564 Flow rate of chlorine plasma is reduced during high density chlorine plasma etching of conductive pattern when the conductive material is substantially removed from the open field
12/30/1997US5702256 Land grid array socket for use with integrated circuit modules of different sizes including modules which are larger than the socket
12/30/1997US5701951 Heat dissipation device for an integrated circuit
12/30/1997US5701645 Acoustic wave device manufacturing method
12/29/1997EP0814643A2 Multilayer printed circuit board
12/29/1997EP0814515A2 Sensor array
12/29/1997EP0814512A2 High-frequency semiconductor device
12/29/1997EP0814511A2 Plastic ball grid array module
12/29/1997EP0814510A2 TAB tape and semiconductor device using the TAB tape
12/29/1997EP0814509A2 Method for making a substrate structure with improved heat dissipation
12/29/1997EP0814508A1 Semiconductor device having element with high breakdown voltage
12/29/1997EP0814497A2 Device structure with layer for facilitating passivation of surface states
12/29/1997EP0813750A1 Process for making a z-axis adhesive and establishing electrical interconnection therewith
12/29/1997EP0792462A4 Probe card assembly and kit, and methods of using same
12/24/1997WO1997049130A1 Method and apparatus for manufacturing side-terminated chips
12/24/1997WO1997048957A1 Pre-application of grease to heat sinks with a protective coating
12/24/1997WO1997048881A1 Integrated converter for extending the life span of electronic components
12/24/1997WO1997048658A1 Photosensitive ceramic green sheet, ceramic package, and process for producing the same
12/24/1997WO1997041602A3 Semiconductor device provided with a resistance element
12/24/1997CN1168739A A novel via hole profile and method of fabrication
12/24/1997CN1168617A Plastic ball grid array module
12/24/1997CN1168537A Semiconductor integrated circuit device having high input/output connections
12/24/1997CN1168536A Semiconductor wafer with solder layer
12/23/1997US5701233 Stackable modules and multimodular assemblies
12/23/1997US5701037 Arrangement for inductive signal transmission between the chip layers of a vertically integrated circuit
12/23/1997US5701034 Packaged semiconductor die including heat sink with locking feature
12/23/1997US5701033 Semiconductor device
12/23/1997US5701032 Integrated circuit package
12/23/1997US5701031 Sealed stacked arrangement of semiconductor devices
12/23/1997US5701029 Semiconductor having polycrystalline silicon sandwiched by semiconductor substrate and metal silicide
12/23/1997US5701028 Semiconductor device having tab leads
12/23/1997US5701027 Programmable interconnect structures and programmable integrated circuits
12/23/1997US5701013 Wafer metrology pattern integrating both overlay and critical dimension features for SEM or AFM measurements
12/23/1997US5700981 Encapsulated electronic component and method for encapsulating an electronic component
12/23/1997US5700975 Semiconductor device
12/23/1997US5700735 Forming four dielectric layers, forming three metal pads, forming apertures in dielectric layers, filling apertures in first and second layers with metal
12/23/1997US5700732 Semiconductor wafer, wafer alignment patterns and method of forming wafer alignment patterns
12/23/1997US5700724 Hermetically sealed package for a high power hybrid circuit
12/23/1997US5700723 Method of packaging an integrated circuit
12/23/1997US5700722 Forming opening in interlayer insulating layer, depositing silica based material, depositing metal layer, diffusing
12/23/1997US5700721 Structure and method for metallization of semiconductor devices
12/23/1997US5700720 Forming lower wires on semiconductor substrate, forming first and second silicon dioxide films by reacting silane gas with hydrogen peroxide, forming upper wires on film
12/23/1997US5700719 Semiconductor device and method for producing the same
12/23/1997US5700716 Forming contact opening through insulating layer, forming titanium layer in bottom of contact opening, forming layer of polysilicon over titanium, annealing
12/23/1997US5700715 Process for mounting a semiconductor device to a circuit substrate
12/23/1997US5700697 Method for packaging an integrated circuit using a reconstructed package
12/23/1997US5700549 Structure to reduce stress in multilayer ceramic substrates
12/23/1997US5700373 Method for sealing a filter
12/23/1997US5700349 Forming offset insulating film on mid interconnection layer so patterns are the same, forming sidewall insulating film on lateral wall surface, forming etch stop layer over all, etching through hole, removing etch stop layer, filling hole
12/23/1997US5700155 Socket for IC package
12/23/1997US5699854 Miniature fan assembly for outputting air in a certain direction
12/23/1997US5699853 Combined heat sink and sink plate
12/23/1997US5699668 Multiple electrostatic gas phase heat pump and method
12/23/1997US5699613 Fine dimension stacked vias for a multiple layer circuit board structure
12/23/1997US5699611 Method of hermetically self-sealing a flip chip
12/23/1997US5699610 Process for connecting electronic devices
12/23/1997CA2083077C Polyimide multilayer interconnection board and method of making the same
12/18/1997WO1997048256A1 Multi-layer circuit having a via matrix interlayer connection and method for fabricating the same
12/18/1997WO1997048133A1 Carrier element for semiconductor chips
12/18/1997WO1997048131A1 Electronic component structure
12/18/1997DE19725464A1 Semiconductor chip stack housing
12/18/1997DE19725236A1 Fixing arrangement e.g. for fixing thermally loaded power semiconductor on cooling device or electric motor housing
12/18/1997DE19722113A1 Metallverdrahtung für Halbleiterbauelemente und Verfahren zum Bilden derselben Metal wiring for semiconductor devices and method of forming same
12/18/1997DE19652395A1 Integrated circuit module
12/18/1997DE19651549A1 Connecting frame or mask apparatus for integrated circuit housing
12/18/1997DE19623826A1 Carrier for semiconductor chip mfr. esp. for construction of smart cards
12/17/1997EP0813245A2 Aluminum interconnections
12/17/1997EP0813244A2 Semisolid thermal interface with low flow resistance
12/17/1997EP0813243A2 Material for a semiconductor device carrier substrate and method of producing the same