| Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155) |
|---|
| 01/20/1999 | CN1205550A Packaged integrated circuit device |
| 01/20/1999 | CN1205549A Cooling plate |
| 01/20/1999 | CN1205548A Organic chip carriers for wire bond-type chip |
| 01/20/1999 | CN1205547A Manufacturing method of semiconductor device having high pressure reflow process and semiconductor device manufactured thereby |
| 01/20/1999 | CN1041743C Thermally conductive adhesive |
| 01/19/1999 | US5862147 Semiconductor device on semiconductor wafer having simple wirings for test and capable of being tested in a short time |
| 01/19/1999 | US5862038 Cooling device for mounting module |
| 01/19/1999 | US5861782 Nonradiative dielectric waveguide and method of producing the same |
| 01/19/1999 | US5861703 Low-profile axial-flow single-blade piezoelectric fan |
| 01/19/1999 | US5861680 Photonic device and process for fabricating the same |
| 01/19/1999 | US5861679 Pattern and method for measuring alignment error |
| 01/19/1999 | US5861677 Low resistivity organic polymers, blended with an adhesion promoter which reacts with a low resistivity metal, to form an intermediate bonding layer that passivates and seals the metal layer inside the dielectric layer |
| 01/19/1999 | US5861675 Tungsten nitride fluorine film having good step coverage for a fine hole |
| 01/19/1999 | US5861674 Multilevel interconnection in a semiconductor device and method for forming the same |
| 01/19/1999 | US5861673 Method for forming vias in multi-level integrated circuits, for use with multi-level metallizations |
| 01/19/1999 | US5861671 Voidless tungsten filled hole, used to connect active silicon regions in a semiconductor substrate; underlying tungsten liner, and overlying dual humped, tungsten shape |
| 01/19/1999 | US5861670 Semiconductor device package |
| 01/19/1999 | US5861669 Semiconductor package for surface mounting |
| 01/19/1999 | US5861668 Semiconductor package |
| 01/19/1999 | US5861667 Single end in out arrangement |
| 01/19/1999 | US5861666 Multiple semiconductor chip assembly |
| 01/19/1999 | US5861665 First layer forms a hydride and a second layer forms solvated hydrogen upon exposure to molecular hydrogen; acting as a one-way valve for transporting hydrogen to the first layer which locks it up; protecting microelectronics, optics |
| 01/19/1999 | US5861664 Terminal resistance elements buried and sintered in ceramic wiring board; computers, electronics; high speed transfer of signals |
| 01/19/1999 | US5861662 Anti-tamper bond wire shield for an integrated circuit |
| 01/19/1999 | US5861660 Integrated-circuit die suitable for wafer-level testing and method for forming the same |
| 01/19/1999 | US5861658 Prevents delamination of passivation layer from integrated circuit or metallization ring; corrosion resistance |
| 01/19/1999 | US5861657 Graded concentration epitaxial substrate for semiconductor device having resurf diffusion |
| 01/19/1999 | US5861656 High voltage integrated circuit |
| 01/19/1999 | US5861653 Semiconductor device having gaseous isolating layer formed in inter-level insulating layer and process of fabrication thereof |
| 01/19/1999 | US5861652 Features a molding compound having an associated capacitanceencapsulates the substrate, the first and second circuits |
| 01/19/1999 | US5861647 VLSI capacitors and high Q VLSI inductors using metal-filled via plugs |
| 01/19/1999 | US5861641 Customizable logic array device |
| 01/19/1999 | US5861634 Charge collector structure for detecting radiation induced charge during integrated circuit processing |
| 01/19/1999 | US5861632 Method for monitoring the performance of an ion implanter using reusable wafers |
| 01/19/1999 | US5861345 In-situ pre-PECVD oxide deposition process for treating SOG |
| 01/19/1999 | US5861344 Depositing first conductive layer over dielectric layer, performing facet etch of first condctive layer over lip of the contact and sputtering the etched material into lower corner of the contact via, depositing second conductive layer |
| 01/19/1999 | US5861341 Plated nickel-gold/dielectric interface for passivated MMICs |
| 01/19/1999 | US5861325 Technique for producing interconnecting conductive links |
| 01/19/1999 | US5861322 Forming metal blocks via electrolysis using the conductive meltable material as an electrode; separating the interconnection substrate from the initial substrate by heating and melting the meltable material |
| 01/19/1999 | US5861320 Position detection mark and position detection method |
| 01/19/1999 | US5860838 Tangle-preventive mechanism in three contact pieces type contact |
| 01/19/1999 | US5860818 Electrical connecting member |
| 01/19/1999 | US5860585 Substrate for transferring bumps and method of use |
| 01/19/1999 | US5860455 Lead bending machine for electronic components |
| 01/19/1999 | US5860211 Applying polyimide precursor containing reactive metal salt to integrated circuit chips; curing; forming passivating layer |
| 01/19/1999 | US5860195 Locking device for locking heat dissipaters mounted on computer circuit boards |
| 01/19/1999 | CA2017720C Sog with moisture-resistant protective capping layer |
| 01/14/1999 | WO1999001898A1 Integrated circuit component |
| 01/14/1999 | WO1999001897A1 Semiconductor module |
| 01/14/1999 | WO1999001896A1 Two-chip power integrated circuit with improved short circuit characteristics |
| 01/14/1999 | WO1999001775A1 Carrier and system for testing bumped semiconductor components |
| 01/14/1999 | WO1999001771A1 Sensor with diaphragm sensor chip |
| 01/14/1999 | WO1999001507A1 Epoxy resin compositions for encapsulating semiconductors, and semiconductor devices |
| 01/14/1999 | DE19820319A1 Substrate-supported chip component production |
| 01/14/1999 | DE19756527A1 Wafer with circuit pattern in element forming and peripheral regions |
| 01/14/1999 | DE19729851A1 Compression spring fastener for electronic component |
| 01/14/1999 | DE19729677A1 Pack casing for power semiconductor components |
| 01/14/1999 | DE19728992A1 Gehäuse für zumindest einen Halbleiterkörper Housing for at least a semiconductor body |
| 01/14/1999 | DE19728693A1 Halbleitermodul Semiconductor module |
| 01/13/1999 | EP0891127A2 TAB circuit protective coating |
| 01/13/1999 | EP0891125A1 Reworkable circuit board assembly including a flip chip |
| 01/13/1999 | EP0890992A1 Interconnection track connecting by several levels of metal an isolated gate of a transistor to a discharge diode inside an integrated circuit and method of manufacturing such a track |
| 01/13/1999 | EP0890991A2 A layout design method for a semiconductor device |
| 01/13/1999 | EP0890989A1 Semiconductor device and method for manufacturing thereof |
| 01/13/1999 | EP0890988A2 Electrical circuit assembly mounted in a housing |
| 01/13/1999 | EP0890987A2 Fine wire of a gold alloy, method of making the same and its use |
| 01/13/1999 | EP0890986A2 Cooling structure of multichip module and methods of manufacturing it |
| 01/13/1999 | EP0890956A2 Semiconductor device having a security circuit for preventing illegal access |
| 01/13/1999 | EP0890843A2 Test socket assembly |
| 01/13/1999 | EP0890617A2 Silicone gel composition for sealing and filling electrical and electronic components |
| 01/13/1999 | EP0890187A1 A method for producing a semiconductor device by the use of an implanting step and a device produced thereby |
| 01/13/1999 | EP0740853B1 Semiconductor device with a carrier body on which a substrate with a semiconductor element is fastened by means of a glue layer and on which a pattern of conductor tracks is fastened |
| 01/13/1999 | CN1204865A Improved silica insulation film with reduced dielectric constant and method of forming same |
| 01/12/1999 | US5859763 Multi chip module cooling apparatus |
| 01/12/1999 | US5859539 For testing multiple semiconductor devices |
| 01/12/1999 | US5859478 Semiconductor device including a main alignment mark having peripheral minute alignment marks |
| 01/12/1999 | US5859477 Apparatus for encapsulating IC packages with diamond substrate thermal conductor |
| 01/12/1999 | US5859476 Semiconductor device |
| 01/12/1999 | US5859475 Carrier strip and molded flex circuit ball grid array |
| 01/12/1999 | US5859474 Reflow ball grid array assembly |
| 01/12/1999 | US5859472 Microelectronic lead assembly to connect microelectronic elements |
| 01/12/1999 | US5859471 Outer leads are coated with metal layers to increase the thickness to obtain desired strength |
| 01/12/1999 | US5859407 Connecting board for connection between base plate and mounting board |
| 01/12/1999 | US5859387 Semiconductor device leadframe die attach pad having a raised bond pad |
| 01/12/1999 | US5859162 Silicone ladder polymer and process for producing the same |
| 01/12/1999 | US5858874 Forming insulating film on substrate, forming contact hole, conductors, film, plug |
| 01/12/1999 | US5858872 Metal contact structure in semiconductor device, and a method of forming the same |
| 01/12/1999 | US5858871 Baking and curing the dielectric material inside the gap has a low density than that above interconnect lines and that in open field |
| 01/12/1999 | US5858869 Method for fabricating intermetal dielectric insulation using anisotropic plasma oxides and low dielectric constant polymers |
| 01/12/1999 | US5858865 Method of forming contact plugs |
| 01/12/1999 | US5858854 Method for forming high contrast alignment marks |
| 01/12/1999 | US5858816 Method for producing circuit board, for semiconductor package, having cavity for accommodating semiconductor element |
| 01/12/1999 | US5858815 Forming light, thin, compact structure having reduced size |
| 01/12/1999 | US5858588 Patterning; etching; planarizing |
| 01/12/1999 | US5858537 Compliant attachment |
| 01/12/1999 | US5858481 Seal is formed of polyphenylene sulfide or liquid crystal polymer having high heat resistance and low thermal expansion cofficient |
| 01/12/1999 | US5858464 Methods and apparatus for minimizing excess aluminum accumulation in CVD chambers |
| 01/12/1999 | US5858461 Technique for forming resin-impregnated fiberglass sheets with improved resistance to pinholing |
| 01/12/1999 | US5858254 Multilayered circuitized substrate and method of fabrication |
| 01/12/1999 | US5858145 Method to control cavity dimensions of fired multilayer circuit boards on a support |