Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
11/1999
11/03/1999EP0954028A1 Memory module
11/03/1999EP0954027A1 Copper interconnection structure incorporating a metal seed layer
11/03/1999EP0954026A2 Conductive paste and method for producing ceramic substrate using the same
11/03/1999EP0954025A1 Process for controlling resin bleeding in integrated circuit packaging
11/03/1999EP0954020A2 Flip chip bonding lands
11/03/1999EP0954016A2 Diffusion barrier for metal conductors
11/03/1999EP0954015A2 High throughput Al-Cu thin film sputtering process on small contact via
11/03/1999EP0953621A1 Adhesive resin composition and sealing resin composition
11/03/1999EP0953603A2 Flame retardant semiconductor encapsulating epoxy resin compositions
11/03/1999EP0953213A2 Patterns of electrically conducting polymers and their application as electrodes or electrical contacts
11/03/1999EP0953210A1 Flip-chip type connection with elastic contacts
11/03/1999EP0953209A1 Direct contact die attach
11/03/1999EP0953208A1 Diamond body
11/03/1999EP0953186A1 Chip card module
11/03/1999EP0953008A1 Thermosetting resin compositions
11/03/1999EP0760020B1 Device having a switch comprising a chromium layer and method for depositing chromium layers by sputtering
11/03/1999EP0714553B1 Method of forming electrically conductive polymer interconnects on electrical substrates
11/03/1999EP0685113B1 Method of repairing a conductive line of a thin film imager or display device and structure produced thereby
11/03/1999CN1234173A Method and device for positioning and retaining micro-building-blocks
11/03/1999CN1233856A Copper interconnection structure incorporating metal seed layer
11/03/1999CN1233855A Infrared detector
11/03/1999CN1233854A Method for forming interconnection structure
11/03/1999CN1233853A Process for forming multilevel interconnection structure
11/03/1999CN1233852A Ultra thin, single phase, diffusion barrier for metal conductors
11/03/1999CN1233849A Flip chip bonding land waving prevention pattern
11/03/1999CN1233756A Semiconductor device measuring socket capable of adjusting contact positions, and semiconductordevice mfg. method using the same
11/03/1999CN1233626A Latence catalyst and use thereof
11/02/1999US5978666 Slotline-mounted flip chip structures
11/02/1999US5978248 Method of anti-fuse repair
11/02/1999US5978229 Circuit board
11/02/1999US5978227 Integrated circuit packages having an externally mounted lead frame having bifurcated distal lead ends
11/02/1999US5978224 Quad flat pack integrated circuit package
11/02/1999US5978223 Dual heat sink assembly for cooling multiple electronic modules
11/02/1999US5978222 Semiconductor device and assembly board having through-holes filled with filling core
11/02/1999US5978221 Radiating spacer, its use and silicone composition
11/02/1999US5978220 Liquid cooling device for a high-power semiconductor module
11/02/1999US5978219 Heat dissipating device
11/02/1999US5978216 Semiconductor package, leadframe, and manufacturing method therefor
11/02/1999US5978206 Stacked-fringe integrated circuit capacitors
11/02/1999US5978058 Thin film transistor liquid crystal display with a silicide layer formed inside a contact hole and fabricating process therefor
11/02/1999US5977863 Low cross talk ball grid array resistor network
11/02/1999US5977794 Logic array having interleaved logic planes
11/02/1999US5977643 Chip-size semiconductor package
11/02/1999US5977642 Dendrite interconnect for planarization and method for producing same
11/02/1999US5977641 Semiconductor device and method for manufacturing the same
11/02/1999US5977640 Highly integrated chip-on-chip packaging
11/02/1999US5977639 Metal staples to prevent interlayer delamination
11/02/1999US5977638 Edge metal for interconnect layers
11/02/1999US5977637 Integrated electronic device having flip-chip connection with circuit board
11/02/1999US5977636 Method of forming an electrically conductive contact plug, method of forming a reactive or diffusion barrier layer over a substrate, integrated circuitry, and method of forming a layer of titanium boride
11/02/1999US5977635 Multi-level conductive structure including low capacitance material
11/02/1999US5977633 Semiconductor device with metal base substrate having hollows
11/02/1999US5977632 Flip chip bump structure and method of making
11/02/1999US5977631 Semiconductor device including a semiconductor package with electromagnetic coupling slots
11/02/1999US5977630 Plural semiconductor die housed in common package with split heat sink
11/02/1999US5977629 Condensed memory matrix
11/02/1999US5977628 Semiconductor device mounted in resin sealed container
11/02/1999US5977627 Packaging construction for very large scale integrated-circuit chips
11/02/1999US5977626 Thermally and electrically enhanced PBGA package
11/02/1999US5977625 Semiconductor package with low strain seal
11/02/1999US5977624 Semiconductor package and assembly for fabricating the same
11/02/1999US5977623 Semiconductor package and socket thereof and methods of fabricating same
11/02/1999US5977622 Stiffener with slots for clip-on heat sink attachment
11/02/1999US5977621 Power semiconductor module
11/02/1999US5977620 Lead frame having a Ni-Mn alloy layer and a Pd layer
11/02/1999US5977619 Horizontal package having die supports leads formed along lead column
11/02/1999US5977618 Semiconductor connection components and methods with releasable lead support
11/02/1999US5977617 Semiconductor device having multilayer film carrier
11/02/1999US5977616 Interdigitated leads-over-chip lead frame, device, and method for supporting an integrated circuit die
11/02/1999US5977615 Lead frame, method of manufacturing lead frame, semiconductor device and method of manufacturing semiconductor device
11/02/1999US5977614 Lead on chip type semiconductor integrated circuit device to avoid bonding wire short
11/02/1999US5977613 Electronic component, method for making the same, and lead frame and mold assembly for use therein
11/02/1999US5977599 Formation of a metal via using a raised metal plug structure
11/02/1999US5977587 Semiconductor device and a method for wiring of a semiconductor device
11/02/1999US5977575 Semiconductor sensor device comprised of plural sensor chips connected to function as a unit
11/02/1999US5977573 Wiring pattern for a semiconductor integrated circuit device
11/02/1999US5977568 Power semiconductor component with a pressure-equalizing contact plate
11/02/1999US5977558 Testchip design for process analysis in sub-micron DRAM fabrication
11/02/1999US5977512 Multi-wavelength laser soldering device with substrate cleaning beam
11/02/1999US5977489 Conductive elastomer for grafting to a metal substrate
11/02/1999US5977479 Structure for coupling between low temperature circuitry and room temperature circuitry
11/02/1999US5976984 Process of making unlanded vias
11/02/1999US5976980 Method and apparatus providing a mechanical probe structure in an integrated circuit die
11/02/1999US5976975 Refractory metal capped low resistivity metal conductor lines and vias
11/02/1999US5976973 Dry etching wiring layers using photoresist pattern
11/02/1999US5976972 Method of making semiconductor apparatus having wiring groove and contact hole formed in a self-alignment manner
11/02/1999US5976971 Fabrication process of a semiconductor device having an interconnection structure
11/02/1999US5976970 Depositing metal in trenches in semiconductor substrate
11/02/1999US5976969 Multilayer; forming aperture in dielectric; coating with refractory; overcoating with aluminum
11/02/1999US5976966 Converting a hydrogen silsesquioxane film to an oxide using a first heat treatment and a second heat treatment with the second heat treatment using rapid thermal processing
11/02/1999US5976965 Method for arranging minute metallic balls
11/02/1999US5976961 Multilayer; controlling dope concentration
11/02/1999US5976953 Three dimensional processor using transferred thin film circuits
11/02/1999US5976943 Method for bi-layer programmable resistor
11/02/1999US5976933 Process for manufacturing an integrated circuit comprising an array of memory cells
11/02/1999US5976917 Integrated circuitry fuse forming methods, integrated circuitry programming methods, and related integrated circuitry
11/02/1999US5976916 Method of producing semiconductor device and encapsulating pellet employed therein
11/02/1999US5976915 Low mutual inductance lead frame device
11/02/1999US5976914 Method of making plastic package for a surface mounted integrated circuit
11/02/1999US5976913 Microelectronic mounting with multiple lead deformation using restraining straps
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