Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
03/2000
03/14/2000US6037278 Method of manufacturing semiconductor devices having multi-level wiring structure
03/14/2000US6037262 Process for forming vias, and trenches for metal lines, in multiple dielectric layers of integrated circuit structure
03/14/2000US6037261 Semiconductor processing method of making electrical contact to a node received within a mass of insulating dielectric material
03/14/2000US6037259 Method for forming identifying characters on a silicon wafer
03/14/2000US6037257 Sputter deposition and annealing of copper alloy metallization
03/14/2000US6037253 Forming interconnects that are smaller than the photolithographic and etching dimensional limits; the sidewall spacer allows interconnects to be formed closer together than possible using conventional photolithography
03/14/2000US6037252 Method of titanium nitride contact plug formation
03/14/2000US6037250 Depositing a copper layer, covering it with first dielectric interlayer, forming a photoresist film serving as a mask, and etching the copper layer using the mask to form hole for exposing a portion of first level copper interconnects
03/14/2000US6037236 Regeneration of alignment marks after shallow trench isolation with chemical mechanical polishing
03/14/2000US6037193 Hermetic sealing of a substrate of high thermal conductivity using an interposer of low thermal conductivity
03/14/2000US6037187 Method of manufacturing photosensitive semiconductor device
03/14/2000US6037065 Electrically conductive concentric metallic layers of nickel and copper or alloys and coating of silver or gold
03/14/2000US6037045 Thick-film paste and ceramic circuit substrate using the same
03/14/2000US6037044 Direct deposit thin film single/multi chip module
03/14/2000US6037001 Method for the chemical vapor deposition of copper-based films
03/14/2000US6036889 Efficiently consolidated to solid metal and bonded firmly to circuit board substrates at low temperature
03/14/2000US6036836 Forming studs to connect spaced high density chips to the board by covering first copper layer with photoresist, then etching pattern and repeating, finally plating with copper so that first and last copper layers are separated
03/14/2000US6036798 Process for producing electronic part with laminated substrates
03/14/2000US6036503 IC socket for a BGA package
03/14/2000US6036326 Illuminated resinous button key with optical means for highlighting character formed on the key
03/14/2000US6036173 Semiconductor element having a carrying device and a lead frame and a semiconductor chip connected thereto
03/14/2000US6036101 Electronic labeling systems and methods and electronic card systems and methods
03/14/2000US6036023 Heat-transfer enhancing features for semiconductor carriers and devices
03/14/2000US6035656 Method and apparatus for cooling electrical components
03/14/2000US6035530 Method of manufacturing interconnect
03/14/2000US6035528 Method of manufacturing electronic components
03/14/2000CA2007956C Epoxy resin composition and semiconductor sealing material comprising same
03/09/2000WO2000013465A1 Low power compact heater for piezoelectric device
03/09/2000WO2000013273A1 Semiconductor device and substrate for semiconductor device
03/09/2000WO2000013235A1 Ternary nitride-carbide barrier layers
03/09/2000WO2000013233A1 Electromagnetic interference shield device and method
03/09/2000WO2000013232A1 Through hole bump contact
03/09/2000WO2000013231A1 Isolated interconnect studs and method for forming the same
03/09/2000WO2000013216A1 Capacitors comprising roughened platinum layers, methods of forming roughened layers of platinum and methods of forming capacitors
03/09/2000WO2000013215A1 Ruthenium silicide diffusion barrier layers and methods of forming same
03/09/2000DE19938308A1 Metal matrix composite component, used as a heat sink or heat dissipating circuit carrier in electronics or as a cooker plate, comprises porous recrystallized silicon carbide infiltrated with a metal or alloy
03/09/2000DE19846232A1 Back face contacted semiconductor device, e.g. an ion-sensitive FET, is produced by metabolizing a back face contact hole for contacting a connection region or metallization level of a front face circuit structure
03/09/2000DE19840239A1 Electrostatic discharge damage protected power semiconductor device, especially IGBT, MOSFET or diode, comprising an ohmic contact metallization of high melting metal
03/09/2000DE19822794C1 Mehrfachnutzen für elektronische Bauelemente, insbesondere akustische Oberflächenwellen-Bauelemente Multiple uses for electronic components, especially surface acoustic wave devices
03/09/2000CA2338550A1 Through hole bump contact
03/09/2000CA2308446A1 Electromagnetic interference shield device and method
03/08/2000EP0984520A2 Inspectable electrical connector for PGA package
03/08/2000EP0984519A2 Low profile electrical connector for a PGA package and terminals therefor
03/08/2000EP0984518A2 Electrical connector for PGA package
03/08/2000EP0984491A1 Explosion protection for semiconductor module
03/08/2000EP0984488A2 Multilayer copper interconnect structure with copper oxide portions and manufacturing method thereof
03/08/2000EP0984485A1 Wiring forming method for semiconductor device and semiconductor device
03/08/2000EP0984051A1 Heat-resistant adhesives and semiconductor devices produced therewith
03/08/2000EP0983843A2 Low temperature co-fired ceramic
03/08/2000EP0983714A2 Method and arrangement for heating a component
03/08/2000EP0983612A1 A thermal conducting trench in a semiconductor structure and method for forming the same
03/08/2000EP0983611A1 An integrated circuit package having interchip bonding and method therefor
03/08/2000CN1246963A Resin sealed semiconductor device and method for manufacturing the same
03/08/2000CN1246943A Authenticity attribute
03/08/2000CN1246731A Chip dimention packaging and method for preparing wafer-class chip dimention packing
03/08/2000CN1246730A Protecting structure for package of integrated circuit
03/08/2000CN1246729A Semiconductor device and manufacture method thereof
03/08/2000CN1246728A Explosive protection for semiconductor module
03/07/2000US6035382 Circuit for receiving a command word for accessing a secure subkey
03/07/2000US6034875 Cooling structure for electronic components
03/07/2000US6034874 Electronic device with heat radiating member
03/07/2000US6034441 Overcast semiconductor package
03/07/2000US6034439 Method and structure for preventing bonding pads from peeling caused by plug process
03/07/2000US6034437 Semiconductor device having a matrix of bonding pads
03/07/2000US6034436 Semiconductor device having an improved through-hole structure
03/07/2000US6034435 Metal contact structure in semiconductor device
03/07/2000US6034434 Optimized underlayer structures for maintaining chemical mechanical polishing removal rates
03/07/2000US6034433 Interconnect structure for protecting a transistor gate from charge damage
03/07/2000US6034430 Integrated thermal coupling for a heat generating device
03/07/2000US6034429 Integrated circuit package
03/07/2000US6034428 Semiconductor integrated circuit device having stacked wiring and insulating layers
03/07/2000US6034427 Ball grid array structure and method for packaging an integrated circuit chip
03/07/2000US6034426 Testable low inductance integrated circuit package
03/07/2000US6034425 Flat multiple-chip module micro ball grid array packaging
03/07/2000US6034424 Package and optoelectronic device
03/07/2000US6034423 Lead frame design for increased chip pinout
03/07/2000US6034422 Lead frame, method for partial noble plating of said lead frame and semiconductor device having said lead frame
03/07/2000US6034421 Semiconductor device including molded IC fixed to casing
03/07/2000US6034420 Electromigration resistant patterned metal layer gap filled with HSQ
03/07/2000US6034419 Semiconductor device with a tungsten contact
03/07/2000US6034418 Having an interlayer insulating film which is comprised of molecules with silicon-oxygen bonds and silicon-fluorine bonds and contains a rare gas
03/07/2000US6034415 Lateral RF MOS device having a combined source structure
03/07/2000US6034401 Local interconnection process for preventing dopant cross diffusion in shared gate electrodes
03/07/2000US6034399 Electrostatic discharge protection for silicon-on-insulator
03/07/2000US6034333 Frame embedded in a polymeric encapsulant
03/07/2000US6034332 Power supply distribution structure for integrated circuit chip modules
03/07/2000US6033984 Dual damascene with bond pads
03/07/2000US6033980 Method of forming submicron contacts and vias in an integrated circuit
03/07/2000US6033979 Method of fabricating a semiconductor device with amorphous carbon layer
03/07/2000US6033942 Method of forming a metal-semiconductor field effect transistors having improved intermodulation distortion using different pinch-off voltages
03/07/2000US6033940 Anodization control for forming offset between semiconductor circuit elements
03/07/2000US6033939 Method for providing electrically fusible links in copper interconnection
03/07/2000US6033938 Antifuse with improved on-state reliability
03/07/2000US6033937 Si O2 wire bond insulation in semiconductor assemblies
03/07/2000US6033936 Method of mounting an LSI package
03/07/2000US6033935 Sockets for "springed" semiconductor devices
03/07/2000US6033933 Method for attaching a removable tape to encapsulate a semiconductor package
03/07/2000US6033931 Semiconductor device including stacked chips having metal patterned on circuit surface and one edge side of chip
03/07/2000US6033930 Lead frame carrying method and lead frame carrying apparatus
03/07/2000US6033923 An optical constant such as a refractive index of the tin film is measured. if the refractive index relative to light having a wavelength of 700 nm is 2.0 or smaller, it is judged that a nitridation degree of the tin film is sufficiently high