Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
06/2000
06/08/2000WO2000033422A1 Electrical contact element and use of the contact element
06/08/2000WO2000033421A1 A contact arrangement and method of creating a semiconductor component
06/08/2000WO2000033379A1 Semiconductor device, method of manufacture thereof, and electronic device
06/08/2000WO2000033378A1 High frequency power transistor device
06/08/2000WO2000033375A1 Anisotropic conductor film, semiconductor chip, and method of packaging
06/08/2000WO2000033374A1 Anisotropic conductor film, semiconductor chip, and method of packaging
06/08/2000WO2000033360A1 A method and apparatus for the transport and tracking of an electronic component
06/08/2000WO2000033096A1 Probe card for probing wafers with raised contact elements
06/08/2000WO2000033089A2 Lithographic contact elements
06/08/2000WO2000019222A3 Semiconductor switching circuit with an integrated self-testing circuit
06/08/2000DE19856331A1 Verfahren zur Eingehäusung elektronischer Bauelemente Method for Eingehäusung electronic components
06/08/2000CA2353473A1 High frequency power transistor device
06/07/2000EP1006766A2 Electronic device
06/07/2000EP1006618A2 Zero-insertion-force socket for pin grid array packages
06/07/2000EP1006581A1 Ferroelectric memory device having a protective layer
06/07/2000EP1006577A2 Multilayer wiring board
06/07/2000EP1006576A1 Semiconductor device
06/07/2000EP1006575A2 Composition for resin sealing a semiconductor device, resin sealed semiconductor device and method of manufacturing the same
06/07/2000EP1006574A1 Semiconductor plastic package and method for producing printed wiring board
06/07/2000EP1006572A1 Slotted damascene lines for low resistive wiring lines for integrated circuit
06/07/2000EP1006505A2 Flat display device
06/07/2000EP1005703A1 Method for producing electrically conductive cross connections between two layers of wiring on a substrate
06/07/2000EP1005642A1 Method and device for determining a parameter for a metallization bath
06/07/2000CN1255746A Tech. for mfg. conductive structure and semiconductor device
06/07/2000CN1255743A In situ measuring method and device for processing semiconductor
06/07/2000CN1053315C Fabrication process for circuit substrate having interconnection leads
06/07/2000CN1053293C Bead array type integrated circuit package method and package part
06/06/2000US6072700 Ball grid array package
06/06/2000US6072698 Chip module with heat insulation for incorporation into a chip card
06/06/2000US6072690 High k dielectric capacitor with low k sheathed signal vias
06/06/2000US6072328 IC devices with a built-in circuit for protecting internal information
06/06/2000US6072243 Semiconductor integrated circuit device capable of surely electrically insulating two semiconductor chips from each other and fabricating method thereof
06/06/2000US6072242 Contact structure of semiconductor memory device for reducing contact related defect and contact resistance and method for forming the same
06/06/2000US6072241 Semiconductor device with self-aligned contact and its manufacture
06/06/2000US6072239 Device having resin package with projections
06/06/2000US6072238 Semiconductor component
06/06/2000US6072237 Borderless contact structure
06/06/2000US6072236 Micromachined chip scale package
06/06/2000US6072235 Terminal arrangement for an SMD-capable hybrid circuit
06/06/2000US6072234 Stack of equal layer neo-chips containing encapsulated IC chips of different sizes
06/06/2000US6072233 Stackable ball grid array package
06/06/2000US6072231 Semiconductor device
06/06/2000US6072230 Exposed leadframe for semiconductor packages and bend forming method of fabrication
06/06/2000US6072228 Multi-part lead frame with dissimilar materials and method of manufacturing
06/06/2000US6072225 Microelectronic devices having interconnects with planarized spun-on glass regions
06/06/2000US6072211 Semiconductor package
06/06/2000US6072200 Gate unit for a hard-driven GTO
06/06/2000US6072191 Interlevel dielectric thickness monitor for complex semiconductor chips
06/06/2000US6072122 Multi-chip packaging structure having chips sealably mounted on opposing surfaces of substrates
06/06/2000US6071832 Method for manufacturing a reliable semiconductor device using ECR-CVD and implanting hydrogen ions into an active region
06/06/2000US6071812 Method of forming a modified metal contact opening to decrease its aspect ratio for deep sub-micron processes
06/06/2000US6071809 Methods for forming high-performing dual-damascene interconnect structures
06/06/2000US6071805 Air gap formation for high speed IC processing
06/06/2000US6071803 Electrical contact to buried SOI structures
06/06/2000US6071801 Method and apparatus for the attachment of particles to a substrate
06/06/2000US6071785 Low resistance ground wiring in a semiconductor device
06/06/2000US6071761 Method for encapsulated integrated circuits
06/06/2000US6071760 Solid-state image sensing device
06/06/2000US6071759 Method for manufacturing semiconductor apparatus
06/06/2000US6071758 Process for manufacturing a chip card micromodule with protection barriers
06/06/2000US6071757 Condensed memory matrix
06/06/2000US6071755 Method of manufacturing semiconductor device
06/06/2000US6071754 Device and method for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice
06/06/2000US6071600 A substrate with integrated circuits and dielectrics for insulation
06/06/2000US6071597 Flexible circuits and carriers and process for manufacture
06/06/2000US6071592 Metal-ceramic composite substrate
06/06/2000US6071559 Dustfree prepreg and method for making an article based thereon
06/06/2000US6071371 Method of simultaneously attaching surface-mount and chip-on-board dies to a circuit board
06/06/2000US6071128 Integrated circuit socket with built in EMC grounding for a heat sink
06/06/2000US6070782 Socketable bump grid array shaped-solder on copper spheres
06/06/2000US6070731 IC receiving tray storage device and mounting apparatus for the same
06/06/2000US6070656 Microelectronic substrate active thermal cooling wick
06/06/2000US6070550 Apparatus for the stabilization of halogen-doped films through the use of multiple sealing layers
06/06/2000US6070321 Solder disc connection
06/02/2000WO2000031799A1 Integrated circuit chip, integrated circuit, printed-circuit board and electronic device
06/02/2000WO2000031798A1 High density electronic package
06/02/2000WO2000031797A2 Device for electronic packaging, pin jig fixture
06/02/2000WO2000031790A1 Process for forming a sion/teos interlevel dielectric with after-treatment of the cvd silicum oxynitride layer
06/02/2000WO2000031775A2 A method of manufacturing an electronic device comprising two layers of organic-containing material
06/02/2000WO2000031686A1 Method for making a flush chip card using a laser engraving step and resulting chip card
06/02/2000WO2000031163A2 Poly(arylene ether) homopolymer compositions and methods of manufacture thereof
06/02/2000WO2000020154A9 Method and apparatus for placing solder balls on a substrate
06/02/2000WO2000014681A3 Circuit chip comprising a specific connection area configuration
06/02/2000CA2351417A1 Integrated circuit chip, integrated circuit, printed-circuit board and electronic device
06/02/2000CA2322683A1 Device for electronic packaging, pin jig fixture
05/2000
05/31/2000EP1005088A1 Sintered body for and manufacture of ceramic substrates
05/31/2000EP1005087A1 Integrated circuit and its manufacturing method
05/31/2000EP1005086A2 Metal foil having bumps, circuit substrate having the metal foil, and semiconductor device having the circuit substrate
05/31/2000EP1005085A2 Resin-encapsulated electronic device
05/31/2000EP1005084A1 Leaded semiconductor device package for use in nonsoldering assembling
05/31/2000EP1005083A1 High-power electronic device comprising cooling system
05/31/2000EP1005082A1 Semiconductor device, method for manufacturing the same, circuit board and electronic apparatus
05/31/2000EP1005078A1 Process for forming a conductive structure
05/31/2000EP1005075A1 Method of fabricating semiconductor device
05/31/2000EP1005074A1 Structure and method for improving low temperature copper reflow in semiconductor features
05/31/2000EP1004630A1 Semiconductor sealing epoxy resin composition and semiconductor device using the same
05/31/2000EP1004142A1 Method and apparatus for identifying integrated circuits
05/31/2000EP1004141A1 A system and method for packaging integrated circuits
05/31/2000DE19957326A1 Contact structures, especially for wafer or chip testing pin cards, are produced by a two-dimensional photolithographic process on a silicon substrate
05/31/2000DE19956107A1 Laser beam formed micro dot mark on surface of semiconductor wafer etc. built-up by dot marks on laser irradiated dot