Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 23 - Details of semiconductor or other solid state devices
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
07/2000
07/04/2000US6084288 Hermetic chip and method of manufacture
07/04/2000US6084282 Low-stress and low-sensitivity metal film
07/04/2000US6084279 Semiconductor device having a metal containing layer overlying a gate dielectric
07/04/2000US6084267 Design propagation delay measurement device
07/04/2000US6084256 Semiconductor integrated circuit device
07/04/2000US6084252 Semiconductor light emitting device
07/04/2000US6084204 Leadframe manufacturing apparatus using laser beams
07/04/2000US6084178 Perimeter clamp for mounting and aligning a semiconductor component as part of a field replaceable unit (FRU)
07/04/2000US6084039 Triglycidyl ether of a (bis(hydroxyaryl)methyl), (hydroxyaryl)-cyclohexane compound of given formula and curing agent forms a polyepoxide having good balance of heat and moisture resistance; use as encapsulant for electronics
07/04/2000US6084037 Epoxy resin composition and semiconductor device
07/04/2000US6083853 Formed sheet of thermoconductive silicone gel and method for producing the same
07/04/2000US6083832 Method of manufacturing semiconductor device
07/04/2000US6083830 Process for manufacturing a semiconductor device
07/04/2000US6083829 Use of a low resistivity Cu3 Ge interlayer as an adhesion promoter between copper and tin layers
07/04/2000US6083821 Integrated circuit having a void between adjacent conductive lines
07/04/2000US6083820 Mask repattern process
07/04/2000US6083816 Semiconductor device and method of manufacturing the same
07/04/2000US6083807 Overlay measuring mark and its method
07/04/2000US6083806 Method of forming an alignment mark
07/04/2000US6083777 Reduced stress LOC assembly
07/04/2000US6083776 Molded lead frame ball grid array
07/04/2000US6083772 Method of mounting a power semiconductor die on a substrate
07/04/2000US6083771 Method and system for manufacturing theft-deterrent computer components
07/04/2000US6083768 Inverted orientation until the viscous material dries or cures enough to maintain definition
07/04/2000US6083666 Method of forming a bump comprising protuberances
07/04/2000US6082623 Cooling system and method for a portable computer
07/04/2000US6082610 Method of forming interconnections on electronic modules
07/04/2000US6082443 Cooling device with heat pipe
07/04/2000US6082440 Heat dissipation system having releasable attachment assembly
07/04/2000US6082129 Sorption refrigeration appliance
07/04/2000US6081978 Resin-encapsulated semiconductor device producing apparatus and method
07/04/2000CA2014871C Package to board variable pitch tab
06/2000
06/29/2000WO2000038235A1 Circuit assembly with at least one nanoelectronic component and method for producing the same
06/29/2000WO2000038232A1 Wire bond compensation
06/29/2000WO2000038231A1 Open-cavity semiconductor die package
06/29/2000WO2000038230A1 Windowed non-ceramic package having embedded frame
06/29/2000WO2000038225A1 Improvement in adhesion of diffusion barrier and fluorinated silicon dioxide using hydrogen based preclean technology
06/29/2000WO2000038224A1 Semiconductor chip interconnect barrier material and fabrication method
06/29/2000WO2000038110A1 Data carrier with chip and fully enclosed connection means
06/29/2000WO2000038109A1 Data carrier module with integrated circuit and transmission coil
06/29/2000WO2000038108A1 Device arranged for contactless communication and provided with a data carrier with fully enclosed holding means for holding a chip and a passive component
06/29/2000WO2000037873A1 A device for temperature control
06/29/2000WO1999065078A3 Semiconductor device
06/29/2000DE19961800A1 New novolak epoxy resin, useful for sealing semiconductor components, has high content of binuclear compounds and low viscosity
06/29/2000DE19960013A1 Casing for high power and current semiconductor component for coupling to lower face of semiconductor wafer is coupled to the strap and surrounded by an insulating casing embedding the wafer top side
06/29/2000DE19958915A1 Protection system against electrical overstress (EOS) of junction or switch-on steps of integrated circuit chip uses semiconductor chip with several conductive in-/output terminal pads having first protective conductor
06/29/2000DE19916636A1 Semiconductor chip with ferromagnetic screen
06/29/2000DE19860415A1 Power semiconductor module, e.g. a diode or IGBT chip module, has a semiconductor element on a base element containing an electrically insulating element which forms a coolant channel
06/28/2000EP1014506A2 Zero insertion force connector for a pin grid-array package
06/28/2000EP1014446A1 Semiconductor device protected against analysis
06/28/2000EP1014445A1 Carrier substrate for producing semiconductor device
06/28/2000EP1014444A1 Integrated circuit with protection layer and fabrication method therefor
06/28/2000EP1014443A1 Passive electronic parts, ic parts, and wafer
06/28/2000EP1014439A1 Method of manufacturing an inter- or intra-metal dielectric comprising air in an integrated circuit
06/28/2000EP1014437A2 In-situ measurement method and apparatus for semiconductor processing
06/28/2000EP1014436A2 Process for producing a substrate
06/28/2000EP1012968A1 Shielded surface acoustical wave package
06/28/2000EP1012942A1 Circuit arrangement for protecting integrated circuits against electrostatic discharges
06/28/2000EP1012880A1 Substrate for electronic packaging, pin jig fixture
06/28/2000EP0782765B1 Polymer stud grid array package
06/28/2000EP0729647B1 Diamond shaped gate mesh for cellular mos transistor array
06/28/2000CN1258190A Method for mfg. printed circuit board
06/28/2000CN1258099A Semiconductor device interconnecting structure and mfg. method
06/28/2000CN1258098A Back electrode type electronic component and electronic assembly mounting same to printed circuit board
06/28/2000CN1053994C 半导体器件 Semiconductor devices
06/27/2000US6081428 Cooling apparatus for electric devices
06/27/2000US6081427 Retainer for press-pack semi-conductor device
06/27/2000US6081426 Semiconductor package having a heat slug
06/27/2000US6081308 Method for manufacturing liquid crystal display
06/27/2000US6081164 PLL oscillator package and production method thereof
06/27/2000US6081040 Semiconductor device having alignment mark
06/27/2000US6081037 Semiconductor component having a semiconductor chip mounted to a chip mount
06/27/2000US6081035 Microelectronic bond ribbon design
06/27/2000US6081033 Interconnections for semiconductor circuits
06/27/2000US6081032 Dual damascene multi-level metallization and interconnection structure
06/27/2000US6081031 Semiconductor package consisting of multiple conductive layers
06/27/2000US6081030 Semiconductor device having separated exchange means
06/27/2000US6081029 Resin encapsulated semiconductor device having a reduced thickness and improved reliability
06/27/2000US6081028 Thermal management enhancements for cavity packages
06/27/2000US6081027 Integrated heat sink
06/27/2000US6081026 High density signal interposer with power and ground wrap
06/27/2000US6081024 TAB tape semiconductor device
06/27/2000US6081023 Semiconductor device
06/27/2000US6081022 Clock distribution network with efficient shielding
06/27/2000US6081006 Reduced size field effect transistor
06/27/2000US6081005 Semiconductor integrated circuit
06/27/2000US6080999 Photosensitive semiconductor device
06/27/2000US6080969 Apparatus for and method of thermally processing substrate
06/27/2000US6080932 Semiconductor package assemblies with moisture vents
06/27/2000US6080931 Semiconductor package
06/27/2000US6080684 During lamination, the first coating acts like an impenetrable insulating sheet, and preventing glass fiber contact with the conductive planes. the second coating is fluid enough to fill in spaces in the planes
06/27/2000US6080669 Very high pressure ionized metal deposition technique which results in improved sidewall step coverage with enhanced subsequent filling of the channel or vias by conductive materials.
06/27/2000US6080668 Sequential build-up organic chip carrier and method of manufacture
06/27/2000US6080659 Method to form an alignment mark
06/27/2000US6080652 Method of fabricating a semiconductor device having a multi-layered wiring
06/27/2000US6080649 Fusible link in an integrated semiconductor circuit and process for producing the fusible link
06/27/2000US6080640 High density integrated circuits
06/27/2000US6080636 Photolitography alignment mark manufacuturing process in tungsten CMP metallization
06/27/2000US6080634 Method of mending and testing semiconductor apparatus
06/27/2000US6080608 Polysilicon pillar heat sinks for semiconductor on insulator circuits
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