Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
08/2000
08/01/2000US6097073 Triangular semiconductor or gate
08/01/2000US6097052 Semiconductor device and a method of manufacturing thereof
08/01/2000US6097045 Semiconductor device having discharging portion
08/01/2000US6097043 Semiconductor integrated circuit and supply method for supplying multiple supply voltages in a semiconductor integrated circuit
08/01/2000US6096981 Packaging electrical circuits
08/01/2000US6096808 Snap cure adhesive based on anhydride/epoxy resins
08/01/2000US6096665 Coating a sheet with a thermosetting resin surrounding the fibers, and filling some, but not all, of said interstices; coating again with a thermosetting resin surrounding the fiber and filling all the interstices; curing; integrated circuits
08/01/2000US6096654 Gapfill of semiconductor structure using doped silicate glasses
08/01/2000US6096649 Creating dummy aluminum based structures to increase the roughens of the surface topography, improving adhesion between an overlying molding substance
08/01/2000US6096641 Method of manufacturing semiconductor device
08/01/2000US6096637 Forming a multilayer interconnection intermetallics which are connected through plugs formed in a connecting hole
08/01/2000US6096636 Methods of forming conductive lines
08/01/2000US6096634 Method of patterning a submicron semiconductor layer
08/01/2000US6096633 Dual damascene process for forming local interconnect
08/01/2000US6096580 Low programming voltage anti-fuse
08/01/2000US6096579 Method for controlling the thickness of a passivation layer on a semiconductor device
08/01/2000US6096577 Method of making semiconductor device, and film carrier tape
08/01/2000US6096574 Injecting a flowable liquid material between the spacings around the semiconductor chips and substrate, curing to form a compliant dielectric layer
08/01/2000US6096572 Forming an electrically conductive protection layer on metal layer to prevent oxidation of metal layer
08/01/2000US6096571 Method of improving alignment signal strength by reducing refraction index at interface of materials in semiconductors
08/01/2000US6096566 Inter-conductive layer fuse for integrated circuits
08/01/2000US6096565 Forming an interconnected layer by encasing within a noble metal gold or silver filled with the high temperature superconductor material; through-holes to enable direct connection of circuitry to the encased superconductor layer
08/01/2000US6096438 Aluminum alloy film has not only a low resistivity and high hillock resistance but also a high dielectric strength when it is anodized into an anodic oxide film
08/01/2000US6096433 Laminated substrate fabricated from semiconductor wafers bonded to each other without contact between insulating layer and semiconductor layer and process of fabrication thereof
08/01/2000US6096404 Full face mask for capacitance-voltage measurements
08/01/2000US6096259 Preparing a template with v-grooves, placing wires in grooves, adding molding compound, curing and removal of template
08/01/2000US6096165 Method and apparatus for application of adhesive tape to semiconductor devices
08/01/2000US6096163 Method and apparatus for application of spray adhesive to a leadframe for chip bonding
08/01/2000US6096111 Pressing agglutinating particle mixture to form compact; melting; powder metallurgy
08/01/2000US6095822 Component module holder
08/01/2000US6095397 Solder deposit support
08/01/2000US6094919 Package with integrated thermoelectric module for cooling of integrated circuits
07/2000
07/27/2000WO2000044212A1 Carbon/carbon cooling system
07/27/2000WO2000044204A1 Electronic ballast with a piezoelectric cooling fan
07/27/2000WO2000044071A1 Electric module for connection to external electric circuits and method of producing the same
07/27/2000WO2000044047A1 Microelectronic structure
07/27/2000WO2000044044A1 Method for reducing the capacitance between interconnects by forming voids in dielectric material
07/27/2000WO2000044042A1 Method for galvanically forming conductor structures of high-purity copper in the production of integrated circuits
07/27/2000WO2000044041A1 Semiconductor integrated circuit and manufacture thereof
07/27/2000WO2000044040A1 Method of wire bonding, semiconductor device, circuit board, electronic device and wire bonder
07/27/2000WO2000016400A8 Applications of protective ceramics
07/27/2000DE19902979A1 Influencing thermal conductivity of solid body in preferred direction involves exposing body to ultrasonic sound field directed in preferred direction; thermal conductivity is increased
07/27/2000DE19901384A1 Elektronisches Bauelement und Verwendung einer darin enthaltenen Schutzstruktur Electronic device and use a protective structure contained therein
07/27/2000DE10002426A1 Band carrier for ball grid array (BGA) used with semiconductor flip-chip with pads in linear arrangement
07/27/2000DE10002348A1 Thermally conducting resistance element in connection frame of semiconductor housing has near arm, paddle and far arm that are electrically connected with paddle arranged between arms
07/27/2000CA2359473A1 Method for electrolytically forming conductor structures from highly pure copper when producing integrated circuits
07/26/2000EP1022781A1 Optical device, electronic device enclosure, and getter assembly
07/26/2000EP1022778A1 Method of dividing a wafer and method of manufacturing a semiconductor device
07/26/2000EP1022777A1 Air gap formation between metal leads for high speed IC processing
07/26/2000EP1022776A2 Wire bonding to copper
07/26/2000EP1022775A1 Semiconductor device, mounting structure thereof and method of fabrication thereof
07/26/2000EP1022773A2 Chip carrier substrate
07/26/2000EP1022352A2 Method for forming metal interconnects with increased electromigration lifetime
07/26/2000EP1021937A2 Method of manufacturing surface-mountable sil hybrid circuit
07/26/2000EP1021837A1 Mounting having an aperture cover with adhesive locking feature for flip chip optical integrated circuit device
07/26/2000EP1021833A1 Device with security integrated circuit and method for making same
07/26/2000EP1021832A1 Semiconductor component and method for the production thereof
07/26/2000EP1021831A1 Improved leadframe structure with preplated leads and process for manufacturing the same
07/26/2000EP1021830A1 Chip scale ball grid array for integrated circuit package
07/26/2000EP1021827A1 Dual damascene metallization
07/26/2000EP1021688A1 Multiple electrostatic gas phase heat pump and method
07/26/2000EP0922379A4 Apparatus for cooling an electronic component
07/26/2000EP0770305B1 Image display apparatus with line number conversion
07/26/2000EP0698289B1 Contact structure for vertical chip connections
07/26/2000CN1261410A Method and device for producing electrically conductive contiuity in semiconductor components.
07/26/2000CN1261384A Organohydridosiloxane resins with high organic content
07/26/2000CN1261206A Ball-array package method for integrated circuits
07/26/2000CN1054944C Thermally activated noise immune fuse
07/25/2000US6094356 Semiconductor device and semiconductor device module
07/25/2000US6094354 Chip component mounting board, chip component mounting structure, and method of manufacturing chip component mounting board
07/25/2000US6094114 Slotline-to-slotline mounted flip chip
07/25/2000US6094058 Temporary semiconductor package having dense array external contacts
07/25/2000US6094056 Multi-chip module with accessible test pads and test fixture
07/25/2000US6093972 Microelectronic package including a polymer encapsulated die
07/25/2000US6093971 Chip module with conductor paths on the chip bonding side of a chip carrier
07/25/2000US6093970 Semiconductor device and method for manufacturing the same
07/25/2000US6093969 Face-to-face (FTF) stacked assembly of substrate-on-bare-chip (SOBC) modules
07/25/2000US6093968 Germanium alloy contact to a silicon substrate
07/25/2000US6093966 Ionizing by biasing refractory metal atoms and silicon atoms to form a copper barrier layer on the insulating layer and in the opening; depositing a copper-containing metal; uniform thickness, avoiding silicon enrichment on trenches' bottoms
07/25/2000US6093964 Connection structure utilizing a metal bump and metal bump manufacturing method
07/25/2000US6093963 Dual landing pad structure including dielectric pocket
07/25/2000US6093961 Heat sink assembly manufactured of thermally conductive polymer material with insert molded metal attachment
07/25/2000US6093960 Semiconductor package having a heat spreader capable of preventing being soldered and enhancing adhesion and electrical performance
07/25/2000US6093959 Lead frame having supporters and semiconductor package using same
07/25/2000US6093958 Lead-on-chip type semiconductor device having thin plate and method for manufacturing the same
07/25/2000US6093957 Multilayer lead frame structure that reduces cross-talk and semiconductor package using same and fabrication method thereof
07/25/2000US6093954 Semiconductor device having variable delay circuit having multi-layered semiconductor structure
07/25/2000US6093942 Semiconductor device with improved pad layout
07/25/2000US6093938 Stacked die integrated circuit device
07/25/2000US6093933 Method and apparatus for fabricating electronic device
07/25/2000US6093894 Multiconductor bonded connection assembly with direct thermal compression bonding through a base layer
07/25/2000US6093889 Semiconductor package and mounting socket thereof
07/25/2000US6093658 Preventing exposed tungsten plugs from eroding during standard semiconductor fabrication by exposing to electron dose to neutralize positve charge
07/25/2000US6093643 Electrically conductive projections and semiconductor processing method of forming same
07/25/2000US6093642 Tungsten-nitride for contact barrier application
07/25/2000US6093641 Method for fabricating semiconductor device with an increased process tolerance
07/25/2000US6093640 Overlay measurement improvement between damascene metal interconnections
07/25/2000US6093637 Forming an insulating film on a semiconductor substrate by (1) dual-frequency plasma enhanced chemical vapor deposition using a higher and lower frequency and a reactive tetraalkyl silane, (2) ozone/tetraalkoxysilane, (3) a third sio2 layer
07/25/2000US6093636 Forming on a substrate a dielectric layer comprising decomposable polymer and thermosetting resin; heating to cure the thermosetting resin; decomposing the decomposable polymer; litographic patterning; depositing a metallic film
07/25/2000US6093635 High-density multimetal layer semiconductor device with features of <0.25 microns; voidless interconnection pattern by filling the gaps with hydrogenpolysilsesquioxane and heat treating in an inert gas to remove water