Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
02/2001
02/01/2001WO2001008223A1 Semiconductor device, method of manufacture thereof, circuit board, and electronic device
02/01/2001WO2001008222A1 Semiconductor device, method of manufacture thereof, circuit board, and electronic device
02/01/2001WO2001008221A1 High frequency module
02/01/2001WO2001008220A1 Semiconductor device
02/01/2001WO2001008219A1 Semiconductor module
02/01/2001WO2001008218A1 Assembly of double-side cooled power semicondutor devices protected from harmful surroundings influences
02/01/2001WO2001008213A1 REDUCED ELECTROMIGRATION AND STRESS INDUCED MIGRATION OF Cu WIRES BY SURFACE COATING
02/01/2001WO2001008093A1 Minicard with integrated circuit and method for obtaining same
02/01/2001WO2001008092A1 Method for making smart card with reduced format
02/01/2001WO2001008088A1 Secure microcontroller against attacks based on current consumption values
02/01/2001WO2001007858A1 Heat exchanger
02/01/2001WO2001007501A1 Epoxy resin composition and semiconductor device
02/01/2001WO2000051012A3 Integrated circuit interconnect system
02/01/2001DE19960244C1 Arrangement for trimming reference voltages in semiconducting chips enables rapid and cost-effective reference voltage trimming
02/01/2001DE19935325A1 Lösemittelfreie, raumtemperaturhärtende Reaktivsysteme und ihre Verwendung zur Herstellung von Klebstoffen, Dichtungsmassen, Vergußmassen, Formteilen oder Beschichtungen Solvent-free, room temperature curing reactive systems and their use for the production of adhesives, sealants, casting compounds, moldings or coatings
02/01/2001DE19931004A1 Chipmodul, insbesondere BGA-Package, mit einem Interconnect zur stressfreien Lötverbindung mit einer Leiterplatte Chip module, in particular BGA package, with an interconnect for stress-free soldered to a circuit board
02/01/2001DE10025218A1 Multi-layer connection process transfer-marking structure e.g. for fabrication of semiconductor devices, has transfer marking lined up with transfer point used in preceding step
02/01/2001DE10012700A1 Halbleitervorrichtung Semiconductor device
01/2001
01/31/2001EP1073152A2 Socket for electrical parts
01/31/2001EP1073124A2 Method for making integrated circuit capacitor including anchored plug
01/31/2001EP1073118A1 Mixed fuse technologies
01/31/2001EP1073117A2 Scratch protection for direct contact sensors
01/31/2001EP1073116A2 Lead frame and semiconductor device
01/31/2001EP1073114A2 Integrated circuit capacitor including anchored metal plug
01/31/2001EP1073113A2 Backside contact for touch sensing chip
01/31/2001EP1073106A2 Method for reducing oxidation of an interface of a semiconductor device and resulting device
01/31/2001EP1073104A2 Scratch resistance improvement by filling metal gaps
01/31/2001EP1073103A1 Backside bus vias
01/31/2001EP1073097A2 Dot mark reading apparatus and reading method
01/31/2001EP1072851A1 Refrigeration device
01/31/2001EP1072180A1 Integrated circuit intercoupling component with heat sink
01/31/2001EP1072058A2 Device for electronic packaging, pin jig fixture
01/31/2001EP1072057A1 Method of manufacturing a vertical metal connection in an integrated circuit
01/31/2001EP1029350A4 Spring clamp assembly for thermal stacked components
01/31/2001CN2417566Y Shaped material superconductive heat radiator for electric power semiconductor equipment and device
01/31/2001CN1282503A Hybrid circuit with heat dissipation system
01/31/2001CN1282286A Pb-free solder-connected structure and electronic device
01/31/2001CN1282107A Wiring and its making method including the described wired semiconductor device and dry etching process
01/31/2001CN1282106A Contact structure and semiconductor device
01/31/2001CN1282105A Liquid epoxy composite for packaging semiconductor and its application
01/31/2001CN1282098A Method for forming semiconductor device
01/30/2001USRE37032 Semiconductor integrated circuit having reduced hillock densities in the multilayer film
01/30/2001US6181977 Control for technique of attaching a stiffener to a flexible substrate
01/30/2001US6181569 Low cost chip size package and method of fabricating the same
01/30/2001US6181561 Heat sink having standoff buttons and a method of manufacturing therefor
01/30/2001US6181560 Semiconductor package substrate and semiconductor package
01/30/2001US6181559 Device for attaching a heat sink
01/30/2001US6181558 Heat absorber and combination electrical apparatus producing heat and heat absorber
01/30/2001US6181556 Thermally-coupled heat dissipation apparatus for electronic devices
01/30/2001US6181200 Radio frequency power device
01/30/2001US6181018 Semiconductor device
01/30/2001US6181017 System for marking electrophoretic dies while reducing damage due to electrostatic discharge
01/30/2001US6181016 Bond-pad with a single anchoring structure
01/30/2001US6181015 Face-down mounted surface acoustic wave device
01/30/2001US6181012 Structure comprising a copper alloy layer laminated between copper conductor body and the interconnected electronic device; electromigration resistance, surface adhesion
01/30/2001US6181011 Method of controlling critical dimension of features in integrated circuits (ICS), ICS formed by the method, and systems utilizing same
01/30/2001US6181010 Semiconductor device and method of manufacturing the same, circuit board and electronic instrument
01/30/2001US6181009 Electronic component with a lead frame and insulating coating
01/30/2001US6181008 Integrated circuit power supply
01/30/2001US6181007 Semiconductor device
01/30/2001US6181006 Thermally conductive mounting arrangement for securing an integrated circuit package to a heat sink
01/30/2001US6181005 Semiconductor device wiring structure
01/30/2001US6181003 Semiconductor device packaged in plastic package
01/30/2001US6181002 Semiconductor device having a plurality of semiconductor chips
01/30/2001US6181000 Lead frame for ball grid array, semiconductor device having it, and process for producing it
01/30/2001US6180999 Lead-free and cyanide-free plating finish for semiconductor lead frames
01/30/2001US6180998 DRAM with built-in noise protection
01/30/2001US6180997 Structure for a multi-layered dielectric layer and manufacturing method thereof
01/30/2001US6180994 Array of sidewall-contacted antifuses having diffused bit lines
01/30/2001US6180993 Ion repulsion structure for fuse window
01/30/2001US6180985 SOI device and method for fabricating the same
01/30/2001US6180964 Low leakage wire bond pad structure for integrated circuits
01/30/2001US6180881 Chip stack and method of making same
01/30/2001US6180874 High density heatsink attachment and method therefor
01/30/2001US6180725 Resin compositions for electric circuit boards
01/30/2001US6180696 A cured epoxy materials has high glass transition temperature as well as excellent electrical and mechanical properties; soldering interconnected structures for jointing semiconductor devices to substrates
01/30/2001US6180695 Flame-retardant resin composition and semiconductor sealant using the same
01/30/2001US6180537 Method of fabricating dielectric layer in alignment marker area
01/30/2001US6180531 Etching amorphous carbon fluoride film using resist as mask;applying negative bias
01/30/2001US6180523 Forming contact hole in insulating layer exposing substrate; forming an adhesion layer on sidewalls of insulating layer and exposed substrate; electrolessly depositing barrier layer; activating; electrolessly plating; patterning
01/30/2001US6180520 Multiple layer interconnects with low stray lateral capacitance
01/30/2001US6180519 Method of forming a layered wiring structure including titanium silicide
01/30/2001US6180518 Method for forming vias in a low dielectric constant material
01/30/2001US6180517 Method of forming submicron contacts and vias in an integrated circuit
01/30/2001US6180513 Apparatus and method for manufacturing a semiconductor device having a multi-wiring layer structure
01/30/2001US6180511 Forming first insulating layer on semiconductor substrate having device such as transistors; forming metal wirings in which titanium/titanium nitride(tin)layer, al layer and tin layer are stacked; forming spacer of tin layer; polishing
01/30/2001US6180505 Forming bulk copper-containing film indirectly on substrate; roughening; laminating impurity film on surface; patterning; forming transition film; covering with gold film; heating structure to produce chemical mixture along interface
01/30/2001US6180504 Method for fabricating a semiconductor component with external polymer support layer
01/30/2001US6180503 Passivation layer etching process for memory arrays with fusible links
01/30/2001US6180498 Alignment targets having enhanced contrast
01/30/2001US6180495 Silicon carbide transistor and method therefor
01/30/2001US6180494 Integrated circuitry, methods of fabricating integrated circuitry, methods of forming local interconnects, and methods of forming conductive lines
01/30/2001US6180445 Method to fabricate high Q inductor by redistribution layer when flip-chip package is employed
01/30/2001US6180437 Adaptable MMIC array
01/30/2001US6180436 Method for removing heat from a flip chip semiconductor device
01/30/2001US6180435 Semiconductor device with economical compact package and process for fabricating semiconductor device
01/30/2001US6180433 Combination inductive coil and integrated circuit semiconductor chip in a single lead frame package and method therefor
01/30/2001US6180265 Aluminum wire bond pad, dielectric layer, nickel layer, solder bump pad, spherical solder bump
01/30/2001US6180261 On which a semiconductor element can be mounted with ease and high reliability, which comprises an insulating layer 3 having an ni--fe-based alloy foil as a core, a wiring conductor 4 on both sides thereof, and an adhesive resin
01/30/2001US6180250 Epoxy resin obtained by glycidyl etherifying a condensation product of a phenol and hydroxybenzaldehyde; condensation product of bisphenol a and formaldehyde; and a urea derivative.