Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
03/2001
03/13/2001US6200833 Method of attaching a leadframe to singulated semiconductor dice
03/13/2001US6200831 Surface-protecting film and resin-sealed semiconductor device having said film
03/13/2001US6200830 Fabrication process of a semiconductor device
03/13/2001US6200829 Microelectronic assembly with connection to a buried electrical element, and method for forming same
03/13/2001US6200828 Integrated circuit package architecture with a variable dispensed compound and method of manufacturing the same
03/13/2001US6200824 Semiconductor device and tape carrier, and method of manufacturing the same, circuit board, electronic instrument, and tape carrier manufacturing device
03/13/2001US6200694 Molybdenum (mo) and tungsten (w) at a ratio in specific range having low resistivity and high workability.
03/13/2001US6200400 Method for making high k dielectric material with low k dielectric sheathed signal vias
03/13/2001US6200373 Method for controlling of certain second phases in aluminum nitride
03/13/2001US6200151 Lower surface contact type contact
03/13/2001US6199743 Apparatuses for forming wire bonds from circuitry on a substrate to a semiconductor chip, and methods of forming semiconductor chip assemblies
03/13/2001US6199627 Heat sink
03/13/2001US6199625 Stackable heat sink for electronic components
03/13/2001US6199624 Folded fin heat sink and a heat exchanger employing the heat sink
03/13/2001US6199567 Method and apparatus for manufacturing semiconductor device
03/13/2001US6199273 Method of forming connector structure for a ball-grid array
03/11/2001CA2316459A1 Ccd wafers with titanium refractory metal
03/08/2001WO2001017033A1 Method for packaging a semiconductor chip containing sensors and resulting package
03/08/2001WO2001017027A1 A parallel plate diode
03/08/2001WO2001017026A1 Post-fuse blow corrosion prevention structure for copper fuses
03/08/2001WO2001017013A2 A method and an apparatus for forming an under bump metallization structure
03/08/2001WO2001017008A1 Hf-fet and method for producing the same
03/08/2001WO2001017004A2 Method of forming a conductive silicide layer on a silicon comprising substrate and method of forming a conductive silicide contact
03/08/2001WO2001016996A2 Circuit and method for producing the same
03/08/2001WO2001016968A1 Sheet capable of absorbing heat and electromagnetic radiation
03/08/2001WO2001016875A1 Chip card module and chip card encompassing said module as well as a method for producing the chip card module
03/08/2001WO2001016025A1 Controlled production of ammonia and other gases
03/08/2001WO2001015819A1 Three-dimensional electrical interconnects
03/08/2001WO2000033089A3 Lithographic contact elements
03/08/2001DE10039646A1 Metal cover placed over and enclosing e.g. piezoelectric resonator on circuit substrate, includes insulating layer on and around edges bordering its open end
03/08/2001DE10033984A1 Hybridlaminat und Verfahren zur Herstellung desselben Hybrid laminate and method of manufacturing the same
03/07/2001EP1081992A2 Component mounting circuit board with resin-molded section covering circuit pattern and inner components
03/07/2001EP1081990A2 A method for forming a solder ball
03/07/2001EP1081989A2 High frequency wiring board and its connecting structure
03/07/2001EP1081764A1 High-frequency module and method of manufacture thereof
03/07/2001EP1081762A2 Constant impedance routing for high performance integrated circuit packaging
03/07/2001EP1081761A1 Semiconductor device
03/07/2001EP1081760A2 Heat sink assembly
03/07/2001EP1081759A2 Cooling unit
03/07/2001EP1081757A1 Multichip module packaging process for known good die burn-in
03/07/2001EP1081753A2 Process to improve filling of contact holes by electroplating
03/07/2001EP1081752A1 Method to form copper interconnects by adding an aluminium layer to the diffusion barrier
03/07/2001EP1081751A2 Methods of pre-cleaning dielectric layers of substrates
03/07/2001EP1081750A2 Recleaning process for metal plug that minimizes damage to low K dielectric
03/07/2001EP1081748A2 Etch stops and alignment marks for bonded wafers
03/07/2001EP1081537A1 Method for processing conductive layer structures and devices including such conductive layer structures
03/07/2001EP1081447A2 Method and apparatus for cooling electrical components
03/07/2001EP1081446A2 Method and apparatus for cooling electrical components
03/07/2001EP1081249A1 Method for depositing fluorinated silica glass layers
03/07/2001EP1081205A1 Resin compositions
03/07/2001EP1081201A1 Sealing material composition for cards and process for producing cards using the composition
03/07/2001EP1080823A2 High-strength solder joint
03/07/2001EP1080615A1 Multiple printed panel for electronics components, and method for constructing bumps, soldering frames, spacers and similar on said multiple printed panel.
03/07/2001EP1080497A1 Display device
03/07/2001EP1080496A1 Thermally conductive mounting arrangement for securing an integrated circuit package to a heat sink
03/07/2001EP1080495A1 Dual-damascene interconnect structures employing low-k dielectric materials
03/07/2001CN2422727Y Radiator with heat-conducting pipe
03/07/2001CN1286593A Radiator unit
03/07/2001CN1286499A Semiconductor device and its mfg. method
03/07/2001CN1286497A Conductive copper wire with redundant liner
03/07/2001CN1286496A Substrate provided with spherical grate array type circuit portion, and installation method therefor
03/07/2001CN1062990C Power source change-over device
03/07/2001CN1062978C Method for forming metallic barrier layer in semiconductor device
03/06/2001USRE37082 RF transistor package with nickel oxide barrier
03/06/2001US6198635 Interconnect layout pattern for integrated circuit packages and the like
03/06/2001US6198634 Electronic package with stacked connections
03/06/2001US6198630 Method and apparatus for electrical and mechanical attachment, and electromagnetic interference and thermal management of high speed, high density VLSI modules
03/06/2001US6198255 Charge/discharge controlling semiconductor device
03/06/2001US6198171 Thermally enhanced quad flat non-lead package of semiconductor
03/06/2001US6198170 Bonding pad and support structure and method for their fabrication
03/06/2001US6198169 Semiconductor device and process for producing same
03/06/2001US6198168 Integrated circuits using high aspect ratio vias through a semiconductor wafer and method for forming same
03/06/2001US6198167 Semiconductor structure exhibiting reduced contact resistance and method for fabrication
03/06/2001US6198166 Power semiconductor mounting package containing ball grid array
03/06/2001US6198165 Semiconductor device
03/06/2001US6198164 Ultra high density integrated circuit semiconductor package and method for fabricating the same
03/06/2001US6198163 Thin leadframe-type semiconductor package having heat sink with recess and exposed surface
03/06/2001US6198162 Method and apparatus for a chip-on-board semiconductor module
03/06/2001US6198161 Semiconductor device
03/06/2001US6198160 Surface mounted type semiconductor device with wrap-around external leads
03/06/2001US6198155 Semiconductor device comprising an integrated circuit provided with a ceramic security coating and method of manufacturing such a device
03/06/2001US6198149 Semiconductor device having novel insulating film structure
03/06/2001US6198143 Semiconductor device including a layer of thermally stable titanium silicide
03/06/2001US6198136 Support chips for buffer circuits
03/06/2001US6198134 Semiconductor device having a common substrate bias
03/06/2001US6197704 Method of fabricating semiconductor device
03/06/2001US6197689 Semiconductor manufacture method with aluminum wiring layer patterning process
03/06/2001US6197688 Interconnect structure in a semiconductor device and method of formation
03/06/2001US6197686 Aluminum metallization by a barrier metal process
03/06/2001US6197685 Method of producing multilayer wiring device with offset axises of upper and lower plugs
03/06/2001US6197684 Method for forming metal/metal nitride layer
03/06/2001US6197682 Structure of a contact hole in a semiconductor device and method of manufacturing the same
03/06/2001US6197680 Method for forming conductive line
03/06/2001US6197679 Semiconductor device and manufacturing method therefor
03/06/2001US6197670 Method for forming self-aligned contact
03/06/2001US6197663 Process for fabricating integrated circuit devices having thin film transistors
03/06/2001US6197628 Providing a substrate assembly having a surface and forming a diffusion barrier layer over at least a portion of the surface, wherein the diffusion barrier layer is formed of ruthenium silicide
03/06/2001US6197621 Custom laser conductor linkage for integrated circuits
03/06/2001US6197619 Method for reinforcing a semiconductor device to prevent cracking
03/06/2001US6197617 Semiconductor device with high reliability of connection between projective electrode of semiconductor element and conductive wire of substrate and method of manufacturing the same