Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
03/2001
03/27/2001CA2242152C Poly fuses in cmos integrated circuits
03/22/2001WO2001020962A1 Spray cooling system
03/22/2001WO2001020955A1 A printed circuit board assembly
03/22/2001WO2001020713A1 Method and apparatus for cooling with a phase change material and heat pipes
03/22/2001WO2001020691A1 Conductive structure based on poly-3,4-alkenedioxythiophene (pedot) and polystyrenesulfonic acid (pss)
03/22/2001WO2001020676A1 Flip chip having integral mask and underfill providing two-stage bump formation
03/22/2001WO2001020675A1 Heat sink including heat receiving surface with protruding portion
03/22/2001WO2001020673A1 A method of constructing an electronic assembly having an indium thermal couple and an electronic assembly having an indium thermal couple
03/22/2001WO2001020672A1 Protective layer for a semiconductor device
03/22/2001WO2001020671A1 Semiconductor wafer level package
03/22/2001WO2001020670A1 Connection arrangement for enabling the use of identical chips in 3-dimensional stacks of chips requiring addresses specific to each chip
03/22/2001WO2001020669A2 Use of additional bonding finger rows to improve wire bond density
03/22/2001WO2001020668A2 AN INTEGRATED RF MxN SWITCH MATRIX
03/22/2001WO2001020665A1 Method for producing a copper connection
03/22/2001WO2001020661A1 Semiconductor wafer with anisotropic conductor film, and method of manufacture thereof
03/22/2001WO2001020660A1 Method of mounting optical and electrical devices, and mounting structure
03/22/2001WO2001020658A1 Wafer coating method for flip chips
03/22/2001WO2001020657A1 Heat sink manufacturing device and manufacturing method
03/22/2001WO2001020649A1 Reducing the coupling between the semiconductor substrate and a coil integrated thereon
03/22/2001WO2001020646A2 Fill strategies in the optical kerf
03/22/2001WO2001020644A2 Method and apparatus for encapsulating semiconductor chips
03/22/2001WO2001019889A1 Highly stable packaging substrates and brominated indane derivatives
03/22/2001US20010000053 Chip stack-type semiconductor package and method for fabricating the same
03/22/2001DE19940759A1 Schaltungsanordnung und Verfahren zu deren Herstellung Circuit arrangement and method for their preparation
03/22/2001DE19940512A1 Verfahren zur Verkappung eines Bauelementes mit einer Kavernenstruktur und Verfahren zur Herstellung der Kavernenstruktur A method for capping a component having a cavity structure and process for producing the cavity structure
03/22/2001DE10033977A1 Intermediate coupling structure for mounting semiconductor chip on printed circuit board has conductor paths between contact pads and bonding pads on opposite sides of dielectric body
03/22/2001DE10015698C1 Semiconductor device has additional marking detected for increasing overly alignment of photomask employed during exposure step of semiconductor manufacture
03/22/2001CA2384962A1 Highly stable packaging substrates and brominated indane derivatives
03/22/2001CA2384784A1 Protective layer for a semiconductor device
03/22/2001CA2350199A1 Heat sink manufacturing device and manufacturing method
03/22/2001CA2349833A1 Heat sink including heat receiving surface with protruding portion
03/21/2001EP1085594A2 High frequency circuit apparatus
03/21/2001EP1085573A1 Method of decreasing the mutual inductance between bond wires in a high frequency amplifying circuit
03/21/2001EP1085572A2 Low pass filter integral with semiconductor package
03/21/2001EP1085571A1 Method for increasing device reliability of a BGA package
03/21/2001EP1085570A2 Chip scale surface mount package for semiconductor device and process of fabricating the same
03/21/2001EP1085569A2 Chip scale surface mount packages for semiconductor device and process of fabricating the same
03/21/2001EP1085568A1 Method for the electrical and mechanical interconnection of microelectronic components
03/21/2001EP1085566A1 Method and apparatus for partially encapsulating semiconductor chips
03/21/2001EP1085565A2 Semiconductor device having sealing film formed on the surface having columnar electrodes thereon and method of manufacturing the same
03/21/2001EP1085563A2 Process for etching an insulating layer and forming a semiconductor device
03/21/2001EP1085561A1 Chip scale surface mount package for semiconductor device and process of fabricating the same
03/21/2001EP1085399A1 Software-based temperature controller circuit in an electronic apparatus
03/21/2001EP1085279A2 Electromagnetic wave-activated sorption refrigeration system
03/21/2001EP1085278A2 Electromagnetic wave-activated sorption refrigeration system
03/21/2001EP1084598A1 System, method and apparatus for purging fluid
03/21/2001EP1084513A1 A method for treating a deposited film for resistivity reduction
03/21/2001EP1084482A1 Method for producing an integrated circuit card and card produced according to said method
03/21/2001EP1084029A2 Electronic devices having thermodynamic encapsulant portions predominating over thermostatic encapsulant portions
03/21/2001CN1288591A Semiconductor device and method of prodn. thereof and semiconductor mounting structure and method
03/21/2001CN1288481A Curable epoxy-based compositions
03/21/2001CN1288261A Lead-frame and resin sealing member with same, and photoelectronic device
03/21/2001CN1288260A Assembled frame for water cooling semi-condustor device
03/21/2001CN1288258A Semiconductor device and mfg. method therefor
03/21/2001CN1288257A Semiconductor device chip scale surface assembling and packaging, and mfg. method therefor
03/21/2001CN1288256A Semiconductor device chip scale surface assembling and packaging, and mfg. method therefor
03/21/2001CN1288255A Semiconductor device chip scale surface assembling and packaging, and mfg. method therefor
03/21/2001CN1288253A Etching insulating layer and mfg. semiconductor device process
03/21/2001CN1063579C Semiconductor device
03/20/2001US6205032 Low temperature co-fired ceramic with improved registration
03/20/2001US6205027 Structure and method for mounting a circuit module
03/20/2001US6205026 Heat sink retention components and system
03/20/2001US6205025 Heat sink structure adapted for use in a computer
03/20/2001US6205023 Cooling arrangement comprising for a heat source a heat sink movable on an external sink
03/20/2001US6205013 Multi-layer metallization capacitive structure for reduction of the simultaneous switching noise in integrated circuits
03/20/2001US6204567 Semiconductor device with circuit cell array and arrangement on a semiconductor chip
03/20/2001US6204566 Resin encapsulated electrode structure of a semiconductor device, mounted semiconductor devices, and semiconductor wafer including multiple electrode structures
03/20/2001US6204565 Support substrate having conductive interconnection pattern; photosensitive adhesive bump
03/20/2001US6204563 Semiconductor device
03/20/2001US6204562 Wafer-level chip scale package
03/20/2001US6204561 Semiconductor device having two-layer contact
03/20/2001US6204559 Ball grid assembly type semiconductor package having improved chip edge support to prevent chip cracking
03/20/2001US6204558 Two ball bump
03/20/2001US6204557 Reduction of topside movement during temperature cycles
03/20/2001US6204556 Structure for and method of mounting image taking element on substrate
03/20/2001US6204555 Microwave-frequency hybrid integrated circuit
03/20/2001US6204554 Surface mount semiconductor package
03/20/2001US6204553 Lead frame structure
03/20/2001US6204552 Semiconductor device
03/20/2001US6204549 Overvoltage protection device
03/20/2001US6204548 Fuse for semiconductor device and semiconductor device
03/20/2001US6204455 Microelectronic component mounting with deformable shell terminals
03/20/2001US6204454 Wiring board and process for the production thereof
03/20/2001US6204448 High frequency microwave packaging having a dielectric gap
03/20/2001US6204356 Polybenzoxazole resin and precursor thereof
03/20/2001US6204305 Polymer blend of (i) a high surface energy polymer and (ii) a low surface energy organosilicon polymer; surface of the article is exposed to ozone and ultraviolet radiation to form a diffusion barrier.
03/20/2001US6204303 Uv curable acrylate material, catalyst, hydrocarbon solvent and conductive filler.
03/20/2001US6204201 Method of processing films prior to chemical vapor deposition using electron beam processing
03/20/2001US6204192 Plasma cleaning process for openings formed in at least one low dielectric constant insulation layer over copper metallization in integrated circuit structures
03/20/2001US6204179 Copper diffusion barrier, aluminum wetting layer and improved methods for filling openings in silicon substrates with copper
03/20/2001US6204167 Method of making a multi-level interconnect having a refractory metal wire and a degassed oxidized, TiN barrier layer
03/20/2001US6204165 Practical air dielectric interconnections by post-processing standard CMOS wafers
03/20/2001US6204162 Production of semiconductor device
03/20/2001US6204161 Self aligned contact pad in a semiconductor device and method for forming the same
03/20/2001US6204095 Method of forming overmolded chip scale package and resulting product
03/20/2001US6204091 Method of assembling a semiconductor chip package
03/20/2001US6204089 Method for forming flip chip package utilizing cone shaped bumps
03/20/2001US6204076 Semiconductor device with unbreakable testing elements for evaluating components and process of fabrication thereof
03/20/2001US6204075 Method of detecting defects in a wiring process
03/20/2001US6204074 Chip design process for wire bond and flip-chip package