Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
04/2001
04/10/2001US6213747 Package stack via bottom leaded plastic (BLP) packaging
04/10/2001US6213382 Forming a ball at an end of gold alloy wire (composed of palladium and bismuth) passing through a capillary which is lowered to press and bond to an electrode; pulling the wire upward to break it off of the ball bonded to the electode
04/10/2001US6213195 Modular coolant manifold for use with power electronics devices having integrated coolers
04/06/2001CA2321537A1 Multifunction lead frame and integrated circuit package incorporating the same
04/05/2001WO2001024266A1 Twisted bitlines architectures
04/05/2001WO2001024264A1 Wafer alignment marks and manufacturing methods
04/05/2001WO2001024262A1 On-chip electric power supply having optimized electromagnetic compatibility
04/05/2001WO2001024261A1 Method for reducing die cracking in integrated circuits
04/05/2001WO2001024260A1 Low cost 3d flip-chip packaging technology for integrated power electronics modules
04/05/2001WO2001024259A2 Semiconductor packaging
04/05/2001WO2001024253A1 Semiconductor device with bond pad and test pad
04/05/2001WO2001024252A1 Electronic device and method of manufacture thereof
04/05/2001WO2001024238A1 Method for forming tungsten silicide film and method for fabricating metal-insulator-semiconductor transistor
04/05/2001WO2001023898A1 Method of manufacturing semiconductor inspection
04/05/2001US20010000158 Silicide glue layer for W-CVD plug application
04/05/2001US20010000156 Package board structure and manufacturing method thereof
04/05/2001US20010000152 Strain release contact system for integrated circuits
04/05/2001US20010000116 Semiconductor device
04/05/2001US20010000114 Semiconductor device with wiring layer of low resistance
04/05/2001DE19945434A1 Selektive Kühlung von Teilflächen eines flächigen elektronischen Bauteils Selective cooling of faces of a planar electronic component
04/05/2001DE19944304A1 Semiconductor structure with multiple metallic layer depositions
04/05/2001DE19940564A1 Chipkartenmodul und diesen umfassende Chipkarte, sowie Verfahren zur Herstellung des Chipkartenmoduls Chip card module and this comprehensive chip card, and processes for producing the smart card module
04/05/2001DE10052845A1 Micro-printed circuit board for integrated circuit, includes conductive planes formed on board and connected to chips on board electrically and board is supported over carrier and heated
04/05/2001DE10045043A1 Semiconductor component used in e.g. mobile phone, mobile information unit, has intermediate connection which couples electrodes on semiconductor component to connection electrodes of resin component
04/05/2001DE10038424A1 Lead terminal structure for electronic components e.g. piezoresonator, has round bar-like terminals mounted at mounting sections of component, which has bent sections formed between mounting section and outer end
04/05/2001DE10034309A1 Boundary layer voltage reducing device for IC package, has ring portion with high thermal coefficient and opening having form and size corresponding to external perimeter of IC at given temperature
04/05/2001DE10031952A1 Mehrchip-Halbleitermodul und Herstellungsverfahren dafür A multi-chip semiconductor module, and manufacturing method thereof
04/05/2001DE10025209A1 Halbleitereinrichtung Semiconductor device
04/05/2001DE10021344A1 Semiconductor device provided with semiconductor chip, has semiconductor circuit and circuit elements respectively formed on front and back surface of semiconductor chip
04/04/2001EP1089604A1 Heat transfer cold plate arrangement
04/04/2001EP1089337A1 Semiconductor device
04/04/2001EP1089336A2 Integrated circuit packages with improved EMI characteristics
04/04/2001EP1089335A1 Semiconductor device
04/04/2001EP1089334A2 Ceramic circuit board
04/04/2001EP1089331A2 Flip chip technology using electrically conductive polymers and dieletrics
04/04/2001EP1089329A1 Production methods of compound semiconductor single crystal and compound semiconductor element
04/04/2001EP1088848A1 Porous materials
04/04/2001EP1088801A1 Aluminum nitride sintered bodies and semiconductor-producing members including same
04/04/2001EP1088344A1 Method for determining the desired decoupling components for power distribution systems
04/04/2001CN2426263Y Electronic component heat sink piece
04/04/2001CN1290424A Encapsulated surface wave component and collective method for making same
04/04/2001CN1290403A Quasi-mesh gate structure including plugs connecting source regious with backside for lateral RF MOS devices
04/04/2001CN1290037A 半导体器件 Semiconductor devices
04/04/2001CN1290036A Holder structure of IC package and its manufacture method
04/04/2001CN1290032A Method for mounting semiconductor chips on basic board with circuit trace and its products
04/04/2001CN1290031A Technology for packing semiconductor chip and its products
04/04/2001CN1289659A Low-temp MEMS vacuum sealing technique for metals
04/04/2001CA2322077A1 Heat sink
04/03/2001US6212089 Semiconductor memory device and defect remedying method thereof
04/03/2001US6212077 Built-in inspection template for a printed circuit
04/03/2001US6212073 Heat sink
04/03/2001US6212072 Electronics package on a plate, and a method of making such a package
04/03/2001US6212070 Zero force heat sink
04/03/2001US6211959 Method of checking for the presence of connection balls
04/03/2001US6211935 Alignment device for an IC-mounted structure
04/03/2001US6211928 Liquid crystal display and method for manufacturing the same
04/03/2001US6211576 Semiconductor device
04/03/2001US6211575 Method and apparatus for identifying customized integrated circuits
04/03/2001US6211574 Semiconductor package with wire protection and method therefor
04/03/2001US6211573 Semiconductor device with an improved lead-chip adhesion structure and lead frame to be used therefor
04/03/2001US6211572 Semiconductor chip package with fan-in leads
04/03/2001US6211570 Semiconductor device having a multilayer interconnection structure
04/03/2001US6211569 Interconnection lines for improving thermal conductivity in integrated circuits and method for fabricating the same
04/03/2001US6211568 Comprising: an insulating layer on a silicon substrate; a contact hole, a ptsi layer, a tiw layer, a tiw(n) layer, an au layer; very stable diffusion barrier by using a nitrided tiw, tiw(n); improved adhesion strength and step coverage
04/03/2001US6211567 Top heatsink for IGBT
04/03/2001US6211566 Method and apparatus to improve the thermal interface between a heat sink and a semiconductor
04/03/2001US6211565 Apparatus for preventing electrostatic discharge in an integrated circuit
04/03/2001US6211564 Integrated circuit package having stepped terminals
04/03/2001US6211563 Semiconductor package with an improved leadframe
04/03/2001US6211561 Interconnect structure and method employing air gaps between metal lines and between metal layers
04/03/2001US6211554 Protection of an integrated circuit with voltage variable materials
04/03/2001US6211551 Solid-state relay
04/03/2001US6211550 Backmetal drain terminal with low stress and thermal resistance
04/03/2001US6211541 Article for de-embedding parasitics in integrated circuits
04/03/2001US6211469 Printed circuit substrate with comb-type electrodes capable of improving the reliability of the electrode connections
04/03/2001US6211468 Flexible circuit with conductive vias having off-set axes
04/03/2001US6211463 Electronic circuit package with diamond film heat conductor
04/03/2001US6211462 Low inductance power package for integrated circuits
04/03/2001US6211461 Chip size package and method of fabricating the same
04/03/2001US6211277 Lead on chip structure semiconductor with epoxy resin
04/03/2001US6211096 Tunable dielectric constant oxide and method of manufacture
04/03/2001US6211085 Method of preparing CU interconnect lines
04/03/2001US6211084 Method of forming reliable copper interconnects
04/03/2001US6211076 Bus line wiring structure in a semiconductor device and method of manufacturing the same
04/03/2001US6211073 Methods for making copper and other metal interconnections in integrated circuits
04/03/2001US6211070 Peripheral structure of a chip as a semiconductor device, and manufacturing method thereof
04/03/2001US6211062 Method for manufacturing semiconductor device having multiple wiring layer
04/03/2001US6211059 Method of manufacturing semiconductor device having contacts with different depths
04/03/2001US6211058 Semiconductor device with multiple contact sizes
04/03/2001US6211057 Method for manufacturing arch air gap in multilevel interconnection
04/03/2001US6211056 Integrated circuit air bridge structures and methods of fabricating same
04/03/2001US6211054 Method of forming a conductive line and method of forming a local interconnect
04/03/2001US6211053 Laser wire bonding for wire embedded dielectrics to integrated circuits
04/03/2001US6211052 Mask repattern process
04/03/2001US6211051 Reduction of plasma damage at contact etch in MOS integrated circuits
04/03/2001US6211049 Forming submicron integrated-circuit wiring from gold, silver, copper, and other metals
04/03/2001US6210999 Method and test structure for low-temperature integration of high dielectric constant gate dielectrics into self-aligned semiconductor devices
04/03/2001US6210995 Method for manufacturing fusible links in a semiconductor device
04/03/2001US6210994 Process for forming an edge structure to seal integrated electronic devices, and corresponding device
04/03/2001US6210993 High density semiconductor package and method of fabrication