| Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155) |
|---|
| 05/08/2001 | US6229221 Integrated circuit device |
| 05/08/2001 | US6229220 Bump structure, bump forming method and package connecting body |
| 05/08/2001 | US6229219 Flip chip package compatible with multiple die footprints and method of assembling the same |
| 05/08/2001 | US6229217 Semiconductor device and method of manufacturing the same |
| 05/08/2001 | US6229216 Silicon interposer and multi-chip-module (MCM) with through substrate vias |
| 05/08/2001 | US6229215 Semiconductor device and manufacturing method thereof |
| 05/08/2001 | US6229213 Germanium alloy electrical interconnect structure |
| 05/08/2001 | US6229211 Semiconductor device and method of manufacturing the same |
| 05/08/2001 | US6229209 Chip carrier |
| 05/08/2001 | US6229208 Postless large multichip module with ceramic lid for space applications |
| 05/08/2001 | US6229207 Organic pin grid array flip chip carrier package |
| 05/08/2001 | US6229206 Bonding pad test configuration |
| 05/08/2001 | US6229205 Semiconductor device package having twice-bent tie bar and small die pad |
| 05/08/2001 | US6229204 Chip on board with heat sink attachment |
| 05/08/2001 | US6229203 Semiconductor interconnect structure for high temperature applications |
| 05/08/2001 | US6229202 Semiconductor package having downset leadframe for reducing package bow |
| 05/08/2001 | US6229201 Integrated circuit having a parasitic resonance filter |
| 05/08/2001 | US6229200 Saw-singulated leadless plastic chip carrier |
| 05/08/2001 | US6229195 Semiconductor device with air gaps between interconnections |
| 05/08/2001 | US6229182 Semiconductor device having protection against electrostatic discharge |
| 05/08/2001 | US6229159 Silicon-based functional matrix substrate and optical integrated oxide device |
| 05/08/2001 | US6229158 Stacked die integrated circuit device |
| 05/08/2001 | US6229100 Low profile socket for microelectronic components and method for making the same |
| 05/08/2001 | US6229099 Multi-layer circuit board with particular pad spacing |
| 05/08/2001 | US6229088 Low profile electronic enclosure |
| 05/08/2001 | US6228778 Semiconductor device having improved insulation film and manufacturing method thereof |
| 05/08/2001 | US6228767 Non-linear circuit elements on integrated circuits |
| 05/08/2001 | US6228764 Method of forming wiring in semiconductor device |
| 05/08/2001 | US6228763 Method of fabricating metal interconnect having inner air spacer |
| 05/08/2001 | US6228762 Methods for forming contact holes having sidewalls with smooth profiles |
| 05/08/2001 | US6228755 Semiconductor device, and manufacturing method therefor |
| 05/08/2001 | US6228744 Manufacturing methods and uses for micro pipe systems |
| 05/08/2001 | US6228705 Overlay process for fabricating a semiconductor device |
| 05/08/2001 | US6228690 Method of manufacturing fuse element used in memory device and fuse element |
| 05/08/2001 | US6228689 Trench style bump and application of the same |
| 05/08/2001 | US6228687 Wafer-level package and methods of fabricating |
| 05/08/2001 | US6228686 Method of fabricating a microelectronic assembly using sheets with gaps to define lead regions |
| 05/08/2001 | US6228685 Framed sheet processing |
| 05/08/2001 | US6228684 Wafer-level package, a method of manufacturing thereof and a method of manufacturing semiconductor devices from such a wafer-level package |
| 05/08/2001 | US6228683 High density leaded ball-grid array package |
| 05/08/2001 | US6228681 Flip chip having integral mask and underfill providing two-stage bump formation |
| 05/08/2001 | US6228678 Flip chip with integrated mask and underfill |
| 05/08/2001 | US6228676 Near chip size integrated circuit package |
| 05/08/2001 | US6228675 Microcap wafer-level package with vias |
| 05/08/2001 | US6228666 Method of testing integrated circuit including a DRAM |
| 05/08/2001 | US6228548 Dividing semiconductor substrate; dielectric isolation |
| 05/08/2001 | US6228511 Structure and process for thin film interconnect |
| 05/08/2001 | US6228470 Composite substrate for electronic components |
| 05/08/2001 | US6228468 High density ceramic BGA package and method for making same |
| 05/08/2001 | US6228466 Printed wiring board and method for manufacturing the same |
| 05/08/2001 | US6228452 Adhesive tape for electronic parts |
| 05/08/2001 | US6227436 Method of fabricating an electronic circuit device and apparatus for performing the method |
| 05/08/2001 | US6227431 Apparatus and method of clamping semiconductor devices using sliding finger supports |
| 05/08/2001 | US6227287 Cooling apparatus by boiling and cooling refrigerant |
| 05/08/2001 | US6227286 Heat sink and information processor using heat sink |
| 05/08/2001 | US6226890 Desiccation of moisture-sensitive electronic devices |
| 05/08/2001 | US6226863 Reworkability method for wirebond chips using high performance capacitor |
| 05/08/2001 | CA2056456C High performance passivation for semiconductor devices |
| 05/03/2001 | WO2001031987A1 An arrangement at an electronical or electrical apparatus |
| 05/03/2001 | WO2001031986A1 Electric module structure formed with a polymer shrunk material |
| 05/03/2001 | WO2001031984A1 Multilayer printed wiring board and method of producing multilayer printed wiring board |
| 05/03/2001 | WO2001031983A1 Method for providing connection between layers of a circuit board |
| 05/03/2001 | WO2001031706A1 Methods for forming co-axial interconnect lines in a cmos process |
| 05/03/2001 | WO2001031705A1 Methods for forming co-axial interconnect in a cmos process |
| 05/03/2001 | WO2001031704A1 Semiconductor device |
| 05/03/2001 | WO2001031703A1 Mounting method and apparatus for electrical components |
| 05/03/2001 | WO2001031702A1 Method for protecting integrated card chips by deposit of an electrically insulating layer by vacuum suction |
| 05/03/2001 | WO2001031699A1 Advanced flip-chip join package |
| 05/03/2001 | WO2001031082A1 Improved diamond thermal management components |
| 05/03/2001 | WO2001004567A3 Method and apparatus for three dimensional inspection of electronic components |
| 05/03/2001 | WO2001001485A3 A semiconductor device |
| 05/03/2001 | US20010000760 Method for forming an integrated circuit interconnect using a dual poly process |
| 05/03/2001 | US20010000757 Semiconductor processing methods of forming integrated circuitry, forming conductive lines, forming a conductive grid, forming a conductive network, forming an electrical interconnection to a node location, forming an electrical interconnection with a transistor source/ drain region, and integrated circuitry |
| 05/03/2001 | US20010000684 Heat sink for chip stacking applications |
| 05/03/2001 | US20010000646 Test system with mechanical alignment for semiconductor chip scale packages and dice |
| 05/03/2001 | US20010000632 Semiconductor device and method for manufacturing the same |
| 05/03/2001 | US20010000631 Chip scale surface mount package for semiconductor device and process of fabricating the same |
| 05/03/2001 | US20010000630 Enbedded memory assembly |
| 05/03/2001 | US20010000629 Semiconductor device and process of producing the same |
| 05/03/2001 | DE19951945A1 Semiconductor component with metallized sidewalls on silicon wafer power components has a metal edging surrounding the components on an underside and on partially covered metal sidewalls and deep troughs etched on silicon wafers. |
| 05/03/2001 | DE19951164A1 Folienverbund Film composite |
| 05/03/2001 | DE19948555A1 Semiconductor chip manufacturing method has contact elements for connecting chip to external electrical components provided before separation of chip from semiconductor wafer |
| 05/03/2001 | DE19946753A1 Method of detecting and preventing regions critical for etching, e.g. for screen printing plate manufacture |
| 05/03/2001 | DE19944306A1 Reduzierung der Kopplung zwischen Halbleitersubstrat und darauf integrierter Spule Reducing the coupling between the semiconductor substrate and integrated coil |
| 05/03/2001 | DE10049551A1 Connection structure for stackable semiconductor chips e.g. LSI chips, has bump electrode and contact spot electrode at top and bottom faces of chip, and connecting electrodes at front and rear of chip |
| 05/02/2001 | EP1096626A2 Process and device for the thermal conditioning of electronic components |
| 05/02/2001 | EP1096567A2 BGA package and method for fabricating the same |
| 05/02/2001 | EP1096566A2 Electronic part and method of assembling the same |
| 05/02/2001 | EP1096565A2 Sealed-by-resin type semiconductor device and liquid crystal display module including the same |
| 05/02/2001 | EP1096564A1 Electronic component package using cap wafer and method therefore |
| 05/02/2001 | EP1096563A2 Semiconductor package with premolded parts |
| 05/02/2001 | EP1096562A2 Method for making a semiconductor device |
| 05/02/2001 | EP1096551A2 Method for making integrated circuits having features with reduced critical dimensions |
| 05/02/2001 | EP1096038A1 Method and apparatus for depositing a film |
| 05/02/2001 | EP1095915A2 Low-temperature firing ceramic composition, process for producing same and wiring substrate prepared by using same |
| 05/02/2001 | EP1095545A1 A thermal management device and method of making such a device |
| 05/02/2001 | EP1095407A1 Integrated silicon-on-insulator integrated circuit with decoupling capacity and method for making such a circuit |
| 05/02/2001 | EP1095405A1 Method and apparatus relating to interconnect lines |
| 05/02/2001 | EP1095404A1 Circuit and a method for the production thereof |
| 05/02/2001 | EP1058949A4 Quasi-mesh gate structure including plugs connecting source regions with backside for lateral rf mos devices |