Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155) |
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06/06/2001 | EP1104584A1 Conductor frame, printed circuit board with a conductor frame and a method for producing a conductor frame |
06/06/2001 | EP1104583A1 Integrated circuit comprising fuse links which can be separated by the action of energy |
06/06/2001 | EP0664923B1 Process and device for forming the connection leads of integrated circuits |
06/06/2001 | CN2433733Y Heat sink assembly |
06/06/2001 | CN2433664Y Fastening device for heat sink |
06/06/2001 | CN1298571A Electronic component |
06/06/2001 | CN1298277A Heating electronic component radiator bound by binding column |
06/06/2001 | CN1298205A Radiator and its producing method |
06/06/2001 | CN1298204A Technology for producing semiconductor device |
06/06/2001 | CN1297963A Polyporous material |
06/06/2001 | CN1297836A Equipment and method for cutting spacer bar |
06/05/2001 | US6243268 Cooled IC chip modules with an insulated circuit board |
06/05/2001 | US6243267 PGA socket with a heat sink fastening device |
06/05/2001 | US6243266 Locking device for CPU packages of different thicknesses |
06/05/2001 | US6243264 SRAM heat sink assembly and method of assembling |
06/05/2001 | US6243263 Heat radiation device for a thin electronic apparatus |
06/05/2001 | US6242817 Fabricated wafer for integration in a wafer structure |
06/05/2001 | US6242816 Method for improving a stepper signal in a planarized surface over alignment topography |
06/05/2001 | US6242815 Flexible substrate based ball grid array (BGA) package |
06/05/2001 | US6242814 Universal I/O pad structure for in-line or staggered wire bonding or arrayed flip-chip assembly |
06/05/2001 | US6242813 Deep-submicron integrated circuit package for improving bondability |
06/05/2001 | US6242812 CSP pin configuration compatible with TSOP pin configuration |
06/05/2001 | US6242811 Interlevel contact including aluminum-refractory metal alloy formed during aluminum deposition at an elevated temperature |
06/05/2001 | US6242808 Wiring is a stacked structure including a barrier layer which prevents copper(cu) atoms from diffusing into substrate, where a precipitated impmurity from cu layer is present at the interface between barrier and copper layers |
06/05/2001 | US6242807 Semiconductor integrated circuit having heat sinking means for heat generating wires |
06/05/2001 | US6242804 Fabrication process of a semiconductor device having a nitride film |
06/05/2001 | US6242803 Semiconductor devices with integral contact structures |
06/05/2001 | US6242802 Moisture enhanced ball grid array package |
06/05/2001 | US6242801 Semiconductor device |
06/05/2001 | US6242800 Heat dissipating device package |
06/05/2001 | US6242799 Anisotropic stress buffer and semiconductor device using the same |
06/05/2001 | US6242798 Stacked bottom lead package in semiconductor devices |
06/05/2001 | US6242797 Semiconductor device having pellet mounted on radiating plate thereof |
06/05/2001 | US6242796 Wiring structure of semiconductor memory device and formation method thereof |
06/05/2001 | US6242791 Semiconductor inductor |
06/05/2001 | US6242790 Using polysilicon fuse for IC programming |
06/05/2001 | US6242789 Vertical fuse and method of fabrication |
06/05/2001 | US6242778 Cooling method for silicon on insulator devices |
06/05/2001 | US6242757 Capacitor circuit structure for determining overlay error |
06/05/2001 | US6242694 Package for housing a photosemiconductor device |
06/05/2001 | US6242513 Method of applying a die attach adhesive |
06/05/2001 | US6242365 Method for preventing film deposited on semiconductor wafer from cracking |
06/05/2001 | US6242358 Method for etching metal film containing aluminum and method for forming interconnection line of semiconductor device using the same |
06/05/2001 | US6242343 Process for fabricating semiconductor device and apparatus for fabricating semiconductor device |
06/05/2001 | US6242339 Connecting, insulation films, silicon dioxide, metals, vapor deposition with reactive gas, forming wire grooves and connecting |
06/05/2001 | US6242337 Semiconductor device and method of manufacturing the same |
06/05/2001 | US6242336 Semiconductor device having multilevel interconnection structure and method for fabricating the same |
06/05/2001 | US6242335 Method for fabricating isolated anti-fuse structure |
06/05/2001 | US6242319 Method for fabricating an integrated circuit configuration |
06/05/2001 | US6242302 Semiconductor processing methods of forming contact openings, methods of forming electrical connections and interconnections, and integrated circuitry |
06/05/2001 | US6242287 Semiconductor device manufacturing method, press die and guide rail including forming a crack perpendicular to an extension of the sealing resin |
06/05/2001 | US6242286 Multilayer high density micro circuit module and method of manufacturing same |
06/05/2001 | US6242285 Stacked package of semiconductor package units via direct connection between leads and stacking method therefor |
06/05/2001 | US6242284 Method for packaging a semiconductor chip |
06/05/2001 | US6242283 Wafer level packaging process of semiconductor |
06/05/2001 | US6242282 Circuit chip package and fabrication method |
06/05/2001 | US6242281 Saw-singulated leadless plastic chip carrier |
06/05/2001 | US6242279 High density wire bond BGA |
06/05/2001 | US6242274 Method of mounting a chip on a flexible foil substrate for positioning on a capsule |
06/05/2001 | US6242111 Heat resistant overcoating |
06/05/2001 | US6242110 Epoxy resin composition and semiconductor device using the same |
06/05/2001 | US6242106 Fine wire made of a gold alloy, method for its production, and its use |
06/05/2001 | US6242078 High density printed circuit substrate and method of fabrication |
06/05/2001 | US6241838 Method of producing a multi-layer ceramic substrate |
06/05/2001 | US6241007 Electronic apparatus with a flat cooling unit for cooling heat-generating components |
06/05/2001 | US6241006 Heat sink for CPU |
06/05/2001 | US6240632 Which prevents a solder resistant film from being peeled off and makes sizes of projecting electrodes uniform |
06/05/2001 | CA2199346C Semiconductor device and manufacturing method of the same |
05/31/2001 | WO2001039562A1 Printed circuit board employing lossy power distribution network to reduce power plane resonances |
05/31/2001 | WO2001039269A1 Method and apparatus for personalization of semiconductor |
05/31/2001 | WO2001039268A1 Clamping heat sinks to circuit boards over processors |
05/31/2001 | WO2001039267A1 Multilayer circuit board and semiconductor device |
05/31/2001 | WO2001039255A2 Radiation shield and radiation shielded integrated circuit device |
05/31/2001 | WO2001039252A2 Active package for integrated circuit |
05/31/2001 | WO2001039250A2 Conductive interconnection |
05/31/2001 | WO2001039220A1 Inductor for integrated circuit and methods of manufacture |
05/31/2001 | WO2001038442A1 Resin composition, molded article therefrom, and utilization thereof |
05/31/2001 | WO2001038417A1 Polyarylene compositions with enhanced modulus profiles |
05/31/2001 | WO2000067320A3 Integrated circuit inductor with high self-resonance frequency |
05/31/2001 | WO2000057468A3 Electric circuit and its method of production |
05/31/2001 | WO2000048252A3 Electrostatic discharge protection of integrated circuits |
05/31/2001 | US20010002345 Socket for electrical parts |
05/31/2001 | US20010002323 Forming thin films by applying a solution of dielectric, heat-curing resin, evaporating the solvent and curing; where the solution contains gas generating additives or solvents that cause dedensification and lower dielectric constant |
05/31/2001 | US20010002322 Fabricating silicide fuse on a semiconductor substrate that includes two separate wells of a second conductivity type disposed within a lightly doped region, of a first, opposite conductivity type; silicide prevents re-closing of circuit |
05/31/2001 | US20010002321 Includes electro- and thermo-conductive heat sink having slot therethrough, dielectric layer on bottom surface near slot, and circuit on dielectric layer, and electrically resistive soldermask that exposes bond pads for solder ball mounting |
05/31/2001 | US20010002320 Extended leads are bonded to the back side of the chip to provide a thermoconduction path to remove heat energy from the chip |
05/31/2001 | US20010002318 By identifying the dimensions of the buses, then predetermined parameters for optimal power slit size and number are used to automatically generate a power slit layer for a mask database |
05/31/2001 | US20010002163 Process for mounting electronic device and semiconductor device |
05/31/2001 | US20010002162 Process for mounting electronic device and semiconductor device |
05/31/2001 | US20010002160 Clamping heat sinks to circuit boards over processors |
05/31/2001 | US20010002072 Creation of subresolution features via flow characteristics |
05/31/2001 | US20010002071 Boron incorporated diffusion barrier material |
05/31/2001 | US20010002070 Semiconductor device and manufacturing process thereof |
05/31/2001 | US20010002069 Semiconductor device and manufacturing method thereof |
05/31/2001 | US20010002067 Resin-encapsulated semiconductor device and method of forming the same |
05/31/2001 | US20010002066 Semiconductor device, lead-patterning substrate, and electronics device, and method for fabricating same |
05/31/2001 | US20010002065 Integrated circuit package having interchip bonding and method therefor |
05/31/2001 | US20010002064 Semiconductor device and manufacturing method thereof |
05/31/2001 | US20010002060 Monolithic inductance-enhancing integrated circuits, complementary metal oxide semiconductor (CMOS) inductance-enhancing integrated circuits, inductor assemblies, and inductance-multiplying methods |
05/31/2001 | US20010002057 Semiconductor device and wiring method thereof |