Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
07/2001
07/26/2001US20010009281 Phase shift mask and fabrication method thereof
07/26/2001US20010009277 Structure and method for reinforcing a semiconductor device to prevent cracking
07/26/2001US20010009203 Multi-layer circuit board
07/26/2001US20010009197 High performance chip packaging and method
07/26/2001US20010009196 High performance chip packaging and method
07/26/2001US20010009187 Heat sink and fan arrangment
07/26/2001DE19962175A1 Re-wiring foil of surface-mount device (SMD) housing for integrated circuit
07/26/2001DE19948570C2 Anordnung zur Verdrahtung von Leiterbahnen Arrangement for the wiring of traces
07/26/2001DE10101766A1 Semiconductor element with a double damascene structure is formed in a dielectric layer structure comprising an upper layer with a first formation, an etch stop layer, and a lower layer with a second formation
07/26/2001DE10101037A1 Semiconductor device has multilayer wiring structure buried in insulating layer, and at least one pad electrode connected to multilayer wiring and covered with protective layer
07/26/2001DE10051601A1 Semiconductor device with multi-layer interconnection structure has blind conductors and stops embedded in insulating layers of LSI circuits
07/26/2001DE10051583A1 Production of a semiconductor device comprises forming an insulating film on a lower layer, selectively removing the insulating film until the lower layer is exposed, forming a metal film, and polishing
07/26/2001DE10027870A1 Laminated decoupling capacitor used in HF circuit, has penetration conductors for external terminal electrodes and internal electrodes connection which are arranged such that magnetic field induced is nullified
07/26/2001DE10026651C1 Material composite used in the production of a housing for a thyristor consists of an aluminum oxide sapphire and an aluminum oxide ceramic sintered via connecting layers
07/26/2001DE10004647C1 Verfahren zum Herstellen eines Halbleiterbauelementes mit einem Multichipmodul und einem Silizium-Trägersubstrat A method of manufacturing a semiconductor device having a multi-chip module and a silicon support substrate
07/26/2001DE10003112C1 Chip mit allseitigem Schutz sensitiver Schaltungsteile vor Zugriff durch Nichtberechtigte durch Abschirmanordnungen (Shields) unter Verwendung eines Hilfschips Chip with all-round protection of sensitive circuit components against access by unauthorized persons by shielding arrangements (Shields) using an auxiliary chips
07/25/2001EP1119056A2 Semiconductor for device and method of fabrication
07/25/2001EP1119049A2 Laminate type semiconductor apparatus
07/25/2001EP1119048A1 Clad plate for lead frames, lead frame using the same, and method of manufacturing the lead frame
07/25/2001EP1119047A1 Plane carrier for a chip module and method of fabrication of a chip module
07/25/2001EP1119046A2 Wire bonding technique and architecture suitable for copper metallization in semiconductor structures
07/25/2001EP1119045A2 Diamond interconnection substrate and a manufacturing method therefor
07/25/2001EP1119038A2 Method of producing a semiconductor device
07/25/2001EP1119037A2 Semiconductor device and method of manufacturing thereof
07/25/2001EP1119035A2 Method for depositing a low dielectric constant film
07/25/2001EP1118403A2 Tungsten-copper composite powder
07/25/2001EP1118122A1 Integrated circuit and method for producing the same
07/25/2001EP1118121A1 Semiconductor device arrangement having configuration via adjacent bond pad coding
07/25/2001EP1118120A1 Package for providing improved electrical contact and methods for forming the same
07/25/2001EP1118119A1 Through hole bump contact
07/25/2001EP1118118A1 A semiconductor device
07/25/2001EP1118117A1 Methods and apparatus for hermetically sealing electronic packages
07/25/2001EP1118109A1 Silicon carbide deposition method and use as a barrier layer and passivation layer
07/25/2001EP1118107A1 In situ deposition of low k si carbide barrier layer, etch stop, and anti-reflective coating for damascene applications
07/25/2001EP1118025A2 Silicon carbide for use as a low dielectric constant anti-reflective coating and its deposition method
07/25/2001EP1117400A2 Antibiotic compositions for treatment of the eye, ear and nose
07/25/2001CN1305662A Surface acoustic wave device package and method
07/25/2001CN1305640A Heatsink and semiconductor laser device and semiconductor laser stack using heatsink
07/25/2001CN1305618A Method for producing integrated circuit card and card produced according to said method
07/25/2001CN1305338A Module substrate and its manufacturing method
07/25/2001CN1305224A Weld interface with mechanical strengthened and its method
07/25/2001CN1305223A Method of manufacturing thin film transistor
07/25/2001CN1068909C Tungsten-copper composite powder
07/24/2001US6266266 Integrated circuit design exhibiting reduced capacitance
07/24/2001US6266265 Memory module using a vacant pin terminal for balancing parasitic capacitive loads
07/24/2001US6266251 Cavity-down ball grid array module
07/24/2001US6266249 Semiconductor flip chip ball grid array package
07/24/2001US6266246 Multi-chip module having interconnect dies
07/24/2001US6266245 Heat dissipation fixture seating structure
07/24/2001US6266244 Mounting method and apparatus for electrical components
07/24/2001US6266242 Circuit module and information processing apparatus
07/24/2001US6265784 Resin sealed semiconductor device having improved arrangement for reducing thermal stress within the device
07/24/2001US6265783 Resin overmolded type semiconductor device
07/24/2001US6265782 Semiconductor device, semiconductor chip mounting substrate, methods of manufacturing the device and substrate, adhesive, and adhesive double coated film
07/24/2001US6265781 Methods and solutions for cleaning polished aluminum-containing layers, methods for making metallization structures, and the structures resulting from these methods
07/24/2001US6265779 Interconnect structure comprising layers of fluorinated dielectric insulation and layers of conductive wiring patterns isolated from by one fluorine-resistant capping material
07/24/2001US6265778 Semiconductor device with a multi-level interconnection structure
07/24/2001US6265777 Semiconductor device with a low resistance wiring layer composed of a polysilicon and a refractory metal
07/24/2001US6265776 Flip chip with integrated flux and underfill
07/24/2001US6265775 Flip chip technique for chip assembly
07/24/2001US6265774 Millimeter wave adjustable cavity package
07/24/2001US6265772 Stacked semiconductor device
07/24/2001US6265771 Dual chip with heat sink
07/24/2001US6265770 Mounting structure of semiconductor chip, liquid crystal device, and electronic equipment
07/24/2001US6265769 Double-sided chip mount package
07/24/2001US6265768 Chip scale package
07/24/2001US6265767 Semiconductor plastic package, metal plate for said package, and method of producing copper-clad board for said package
07/24/2001US6265766 Flip chip adaptor package for bare die
07/24/2001US6265765 Fan-out semiconductor chip assembly
07/24/2001US6265764 Interdigitated capacitor design for integrated circuit lead frames
07/24/2001US6265763 Multi-chip integrated circuit package structure for central pad chip
07/24/2001US6265762 Lead frame and semiconductor device using the lead frame and method of manufacturing the same
07/24/2001US6265761 Semiconductor devices with improved lead frame structures
07/24/2001US6265760 Semiconductor device, and semiconductor device with die pad and protruding chip lead frame and method of manufacturing the same
07/24/2001US6265759 Laterally situated stress/strain relieving lead for a semiconductor chip package
07/24/2001US6265753 Imidizing and curing an oligomeric precursor compound comprising a polybenzoxazole, polybezothiazole polyamic acid ester end-capped with an aryl-substituted acetylene moiety; enhanced isotropic optical and dielectrical properties
07/24/2001US6265729 Method for detecting and characterizing plasma-etch induced damage in an integrated circuit
07/24/2001US6265728 Compound semiconductor device and method for controlling characteristics of the same
07/24/2001US6265673 Semiconductor element-mounting board and semiconductor device
07/24/2001US6265660 Package stack via bottom leaded plastic (BLP) packaging
07/24/2001US6265462 Method for Producing a Diffusion Barrier and Polymeric Article Having a Diffusion Barrier
07/24/2001US6265334 Contains a cordierite crystal phase, wherein a phase of a crystalline aluminum silicate containing an alkaline earth element other than mg or a rare earth or ga or in disilicate; low thermal expansion
07/24/2001US6265308 Slotted damascene lines for low resistive wiring lines for integrated circuit
07/24/2001US6265303 Integrated circuit dielectric and method
07/24/2001US6265300 Wire bonding surface and bonding method
07/24/2001US6265299 Integrated circuitry fuse forming methods, integrated circuitry programming methods, and related integrated circuitry
07/24/2001US6265294 Integrated circuit having double bottom anti-reflective coating layer
07/24/2001US6265257 Method of making a barrier layer to protect programmable antifuse structure from damage during fabrication sequence
07/24/2001US6265246 Microcap wafer-level package
07/24/2001US6265245 Compliant interconnect for testing a semiconductor die
07/24/2001US6265234 Alignment system for a spherical device
07/24/2001US6265233 Method for determining crack limit of film deposited on semiconductor wafer
07/24/2001US6265090 Silver coated with metal oxide; high contraction starting temperature
07/24/2001US6265042 Adhesive tape for electronic parts
07/24/2001US6264778 Reinforced sealing technique for an integrated circuit package
07/24/2001US6264709 Method for making electrical and electronic devices with vertically integrated and interconnected thin-film type battery
07/24/2001US6264477 Photolithographically patterned spring contact
07/24/2001US6264097 Method for forming a solder ball
07/24/2001US6263957 Integrated active cooling device for board mounted electric components
07/24/2001US6263956 Heat dissipating structure and its manufacturing method