Patents
Patents for H01L 23 - Details of semiconductor or other solid state devices (226,155)
08/2001
08/01/2001EP0970333B1 Electromagnetic wave-activated sorption refrigeration system
08/01/2001EP0970332B1 Method and apparatus for cooling electrical components
08/01/2001CN1306676A Lead frame for semiconductor device
08/01/2001CN1306675A Electronic device having fibrous interface
08/01/2001CN1306476A Method of making adhesive preform lid for electronic devices
08/01/2001CN1306475A Transferrable compliant fibrous thermal interface
08/01/2001CN1306327A Sheet-shape surging absorber and its mfg. method
08/01/2001CN1306301A Prodn tech of semiconductor device and its conductive structure
08/01/2001CN1306300A Semiconductor device and its mfg. method
08/01/2001CN1305944A Air tight method for packing micro system in-situ
07/2001
07/31/2001US6269327 System and method for generating wire bond fingers
07/31/2001US6269209 Resin sealed optical module
07/31/2001US6269003 Heat dissipater structure
07/31/2001US6269002 Heat sink with flow guide
07/31/2001US6269001 System for enhanced cooling and latching of pluggable electronic component
07/31/2001US6268779 Integrated oscillators and tuning circuits
07/31/2001US6268717 Semiconductor test structure with intentional partial defects and method of use
07/31/2001US6268662 Wire bonded flip-chip assembly of semiconductor devices
07/31/2001US6268661 Semiconductor device and method of its fabrication
07/31/2001US6268660 Silicon packaging with through wafer interconnects
07/31/2001US6268659 Semiconductor body with layer of solder material comprising chromium
07/31/2001US6268658 Semiconductor integrated circuit device for connecting semiconductor region and electrical wiring metal via titanium silicide layer and method of fabrication thereof
07/31/2001US6268656 Method and structure for uniform height solder bumps on a semiconductor wafer
07/31/2001US6268655 Semiconductor device including edge bond pads and methods
07/31/2001US6268654 Integrated circuit package having adhesive bead supporting planar lid above planar substrate
07/31/2001US6268653 High power; containing high temperature solder
07/31/2001US6268652 CSP type semiconductor device with reduced package size
07/31/2001US6268650 Semiconductor device, ball grid array connection system, and method of making
07/31/2001US6268649 Stackable ball grid array package
07/31/2001US6268648 Board for mounting semiconductor element, method for manufacturing the same, and semiconductor device
07/31/2001US6268647 Electronic component with an insulating coating
07/31/2001US6268646 Lead frame for lead on chip
07/31/2001US6268645 Semiconductor device
07/31/2001US6268644 Semiconductor device
07/31/2001US6268643 Lead frame device for delivering electrical power to a semiconductor die
07/31/2001US6268642 Wafer level package
07/31/2001US6268641 Semiconductor wafer having identification indication and method of manufacturing the same
07/31/2001US6268638 Metal wire fuse structure with cavity
07/31/2001US6268619 Integrated circuits
07/31/2001US6268616 Electrical wiring board and method for identifying same
07/31/2001US6268568 Printed circuit board with oval solder ball lands for BGA semiconductor packages
07/31/2001US6268291 Method for forming electromigration-resistant structures by doping
07/31/2001US6268290 Method of forming wirings
07/31/2001US6268284 In situ titanium aluminide deposit in high aspect ratio features
07/31/2001US6268279 Trench and via formation in insulating films utilizing a patterned etching stopper film
07/31/2001US6268278 Semiconductor device and manufacturing process thereof
07/31/2001US6268277 Method of producing air gap for reducing intralayer capacitance in metal layers in damascene metalization process and product resulting therefrom
07/31/2001US6268262 Method for forming air bridges
07/31/2001US6268239 Semiconductor chip cooling structure and manufacturing method thereof
07/31/2001US6268237 Stress-free silicon wafer and a die or chip made therefrom and method
07/31/2001US6268236 Method of manufacturing a semiconductor device having a package structure, and semiconductor device manufactured thereby
07/31/2001US6268090 Process for manufacturing semiconductor device and exposure mask
07/31/2001US6268058 Security card comprising a thin glass layer
07/31/2001US6268033 Polyimide
07/31/2001US6268017 Plating, overcoating zones with gelatin
07/31/2001US6268016 Electroless deposition of metals
07/31/2001US6267287 Apparatus and method of clamping semiconductor devices using sliding finger supports
07/31/2001US6267178 Built-up heat exchanger
07/31/2001US6267167 Method and apparatus for application of adhesive tape to semiconductor devices
07/31/2001US6266872 Method for making a connection component for a semiconductor chip package
07/31/2001CA2209326C Apparatus for heating and cooling an electronic device
07/26/2001WO2001054232A2 Flexible compliant interconnect assembly
07/26/2001WO2001054196A1 Dual-sided, surface mountable integrated circuit package
07/26/2001WO2001054195A1 Integrated circuit package incorporating programmable elements
07/26/2001WO2001054194A1 Personalized hardware
07/26/2001WO2001054193A2 Flat support for a chip module and method for producing a chip module
07/26/2001WO2001054191A1 Damascene structure and method for forming a damascene structure
07/26/2001WO2001054169A2 Cooling apparatus
07/26/2001WO2001054148A1 Coil and coil system to be integrated in a microelectronic circuit, and a microelectronic circuit
07/26/2001WO2001054058A1 Method to manufacture a smart label inlet web and a smart label inlet web
07/26/2001WO2001053890A1 Photosensitive resin composition
07/26/2001WO2001001453A3 Method and apparatus for adjusting electrical characteristics of signal traces in layered circuit boards
07/26/2001WO2000067320B1 Integrated circuit inductor with high self-resonance frequency
07/26/2001WO2000028664A3 Fully integrated tuner architecture
07/26/2001US20010010093 Layout design method
07/26/2001US20010010064 Semiconductor multi-chip module
07/26/2001US20010009806 Reducing contact resistance generated on the P-type impurity area without increasing a chip size
07/26/2001US20010009804 Conductive layer on the insulating layer is polished to leave the conductive layer in the groove by a CMP method to form electrodes wire
07/26/2001US20010009802 Closed conductive pattern in the dielectric layer, electrically connecting the two spaced conductive patterns
07/26/2001US20010009795 Simplified high Q inductor substrate
07/26/2001US20010009789 Semiconductor device and manufacturing method thereof
07/26/2001US20010009787 Method for forming a bottom electrode of a storage capacitor
07/26/2001US20010009782 Multi-layer electronic device package comprising first and second outer layers and a plurality of signal layers disposed between the outer layers, signal layers including signal traces and ground traces interleaved with signal traces
07/26/2001US20010009780 Semiconductor device and process for fabrication thereof
07/26/2001US20010009779 Circuit chip package and fabrication method
07/26/2001US20010009724 Depositing coating on elongate member to give a coated elongate member, coating comprising at least one metal and at least one additive, the additive capable of codepositing with the metal, heat treating; electronics packaging
07/26/2001US20010009342 Electronic component and method of production thereof
07/26/2001US20010009305 Microelectronic elements with deformable leads
07/26/2001US20010009304 Semiconductor device
07/26/2001US20010009303 Local interconnect structures for integrated circuits and methods for making the same
07/26/2001US20010009302 Semiconductor device having a carbon fiber reinforced resin as a heat radiation plate having a concave portion
07/26/2001US20010009301 Semiconductor devices having different package sizes made by using common parts
07/26/2001US20010009300 Semiconductor element having external connection terminals, method of manufacturing the semiconductor element, and semiconductor device equipped with the semiconductor element
07/26/2001US20010009299 Flexible wiring board, method of manufacturing flexible wiring board and display device equipped with flexible wiring board
07/26/2001US20010009298 Chip scale surface mount packages for semiconductor device
07/26/2001US20010009297 Bonding pad on a semiconductor chip
07/26/2001US20010009296 Process for forming an integrated circuit
07/26/2001US20010009295 Semiconductor device and process for producing the same
07/26/2001US20010009294 Method of forming an alignment key on a semiconductor wafer
07/26/2001US20010009293 Encapped oligomeric polybenzoxazole, polybenzothiazole, polyamic acid or polyamic acid esters as precursors for dielectric compounds